M42800A Atmel Corporation, M42800A Datasheet - Page 93
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
M42800A
Manufacturer Part Number
M42800A
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.M42800A.pdf
(224 pages)
4.M42800A.pdf
(27 pages)
Specifications of M42800A
Flash (kbytes)
0 Kbytes
Pin Count
144
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
54
Usb Speed
No
Usb Interface
No
Spi
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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ARM DDI 0029G
ARM7TDMI test chip or product
ARM7TDMI core
At the core level, TBE and DBE are inactive, tied HIGH, because in a packaged part
you do not have to manually force the internal buses into a high impedance state. At the
pad level, the test chip signal EDBE is used by the bus control logic to allow the external
memory controller to arbitrate the bus and asynchronously disable the ARM7TDMI
core test chip if necessary.
scan
scan
scan
cell
cell
cell
Note
Copyright © 1994-2001. All rights reserved.
MCLK
DBE
nENOUT
nENIN
TBE
D[31:0]
Vdd
Vdd
Vss
nEDBE
Figure 3-17 Test chip data bus circuit
nEN1
nEN2
Pad
Memory Interface
MCLK
EDBE
XD[31:0]
3-23
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