SAM3N4A Atmel Corporation, SAM3N4A Datasheet - Page 50

no-image

SAM3N4A

Manufacturer Part Number
SAM3N4A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3N4A

Flash (kbytes)
256 Kbytes
Pin Count
48
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
24
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
10.4.3.12
• PRIMASK
0 = no effect
1 = prevents the activation of all exceptions with configurable priority.
10.4.3.13
• FAULTMASK
0 = no effect
1 = prevents the activation of all exceptions.
The processor clears the FAULTMASK bit to 0 on exit from any exception handler except the NMI handler.
50
31
23
15
31
23
15
7
7
SAM3N
Priority Mask Register
Fault Mask Register
30
22
14
30
22
14
6
6
The PRIMASK register prevents activation of all exceptions with configurable priority. See the
register summary in
The FAULTMASK register prevents activation of all exceptions. See the register summary in
Table 10-2 on page 44
29
21
13
29
21
13
5
5
Table 10-2 on page 44
Reserved
Reserved
for its attributes. The bit assignments are:
28
20
12
28
20
12
4
4
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
27
19
11
27
19
11
3
3
for its attributes. The bit assignments are:
26
18
10
26
18
10
2
2
25
17
25
17
9
1
9
1
11011A–ATARM–04-Oct-10
FAULTMASK
PRIMASK
24
16
24
16
8
0
8
0

Related parts for SAM3N4A