SAM3N4A Atmel Corporation, SAM3N4A Datasheet - Page 510

• Manufacturer Part Number: SAM3N4A
• Manufacturer: Atmel Corporation

Specifications of SAM3N4A

• Flash (kbytes): 256 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 24
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Figure 29-8. Receiver Framing Error
29.5.3
29.5.3.1
29.5.3.2
29.5.3.3
510
510
FRAME
RXRDY
SAM3N
SAM3N
URXD
Transmitter
Transmitter Reset, Enable and Disable
Transmit Format
Transmitter Control
S
D0
After device reset, the UART transmitter is disabled and it must be enabled before being used.
The transmitter is enabled by writing the control register UART_CR with the bit TXEN at 1. From
this command, the transmitter waits for a character to be written in the Transmit Holding Register
(UART_THR) before actually starting the transmission.
The programmer can disable the transmitter by writing UART_CR with the bit TXDIS at 1. If the
transmitter is not operating, it is immediately stopped. However, if a character is being pro-
cessed into the Shift Register and/or a character has been written in the Transmit Holding
Register, the characters are completed before the transmitter is actually stopped.
The programmer can also put the transmitter in its reset state by writing the UART_CR with the
bit RSTTX at 1. This immediately stops the transmitter, whether or not it is processing
characters.
The UART transmitter drives the pin UTXD at the baud rate clock speed. The line is driven
depending on the format defined in the Mode Register and the data stored in the Shift Register.
One start bit at level 0, then the 8 data bits, from the lowest to the highest bit, one optional parity
bit and one stop bit at 1 are consecutively shifted out as shown in the following figure. The field
PARE in the mode register UART_MR defines whether or not a parity bit is shifted out. When a
parity bit is enabled, it can be selected between an odd parity, an even parity, or a fixed space or
mark bit.
Figure 29-9. Character Transmission
When the transmitter is enabled, the bit TXRDY (Transmitter Ready) is set in the status register
UART_SR. The transmission starts when the programmer writes in the Transmit Holding Regis-
ter (UART_THR), and after the written character is transferred from UART_THR to the Shift
D1
Baud Rate
Example: Parity enabled
D2
UTXD
Clock
D3
D4
Start
Bit
D5
D6
D0
D7
D1
P
Detected at 0
Stop Bit
D2
stop
D3
D4
RSTSTA
D5
D6
D7
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
Parity
Bit
Stop
Bit