SAM3S16C Atmel Corporation, SAM3S16C Datasheet - Page 206
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SAM3S16C
Manufacturer Part Number
SAM3S16C
Description
Manufacturer
Atmel Corporation
Datasheet
1.SAM3S16C.pdf
(1130 pages)
Specifications of SAM3S16C
Flash (kbytes)
1024 Kbytes
Pin Count
100
Max. Operating Frequency
100 MHz
Cpu
Cortex-M3
# Of Touch Channels
39
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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12.22.4
• ADDR
Region base address field. The value of N depends on the region size. For more information see
• VALID
MPU Region Number valid bit:
Write:
0 = RNR not changed, and the processor:
updates the base address for the region specified in the RNR
ignores the value of the REGION field
1 = the processor:
updates the value of the RNR to the value of the REGION field
updates the base address for the region specified in the REGION field.
Always reads as zero.
• REGION
MPU region field:
For the behavior on writes, see the description of the VALID field.
On reads, returns the current region number, as specified by the RNR.
12.22.4.1
164
N-1
31
23
15
SAM3S16
MPU Region Base Address Register
The ADDR field
Reserved
30
22
14
6
The RBAR defines the base address of the MPU region selected by the RNR, and can update
the value of the RNR. See the register summary in
Write RBAR with the VALID bit set to 1 to change the current region number and update the
RNR. The bit assignments are:
The ADDR field is bits[31:N] of the RBAR. The region size, as specified by the SIZE field in the
RASR, defines the value of N:
If the region size is configured to 4GB, in the RASR, there is no valid ADDR field. In this case,
the region occupies the complete memory map, and the base address is 0x00000000.
The base address is aligned to the size of the region. For example, a 64KB region must be
aligned on a multiple of 64KB, for example, at 0x00010000 or 0x00020000.
N = Log
29
21
13
5
2
(Region size in bytes),
VALID
28
20
12
4
ADDR
ADDR
ADDR
27
19
11
3
Table 12-35 on page 159
26
18
10
2
REGION
“The ADDR field”
25
17
9
1
11117B–ATARM–18-Oct-11
for its attributes.
24
16
N
0
.
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