SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 391
SAM3U2C
Manufacturer Part Number
SAM3U2C
Description
Manufacturer
Atmel Corporation
Specifications of SAM3U2C
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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25.16.3.1
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
NAND Flash Controller Timing Engine
When the NFC Command register is written, the NFC issues a NAND Flash Command and
optionally performs a data transfer between the NFC SRAM and the NAND Flash device. The
NAND Flash Controller Timing Engine guarantees valid NAND Flash timings, depending on the
set of parameters decoded from the address bus. These timings are defined in the
SMC_TIMINGS register.
For information on the timing used depending on the command, see
Figure 25-36. NAND Flash Controller Timing Engine
See
”NFC Address Command”
Timing Check Engine
register description and
NFCEN=1 NFCWR =1 TADL =1
NFCEN=1 NFCWR=0 TWB != 0
!NFCEN=1 VCMD2=0 ACYCLE!=0 NFCWR=1 TADL != 0
!NFCEN=1 VCMD2=0 ACYCLE!=0 NFCWR=0 TAR != 0
!NFCEN=1 VCMD2=0 ACYCLE!=0 TCLR != 0
NFCEN=0 VCMD2=1 TCLR != 0
Wait TADL
Wait TADL
Wait TCLR
Wait TCLR
Wait TWB
Wait TAR
”SMC Timings
SAM3U Series
SAM3U Series
Figure
Register”.
25-36:
391
391
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