SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 57

• Manufacturer Part Number: SAM3U2C
• Manufacturer: Atmel Corporation

Specifications of SAM3U2C

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 36
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.3.3
6430E–ATARM–29-Aug-11
Core registers
The processor core registers are:
Table 13-2.
Program Counter
Name
R0-R12
MSP
PSP
LR
PC
PSR
ASPR
IPSR
EPSR
PRIMASK
Low registers
High registers
Stack Pointer
Link Register
Core register set summary
Type
RW
RW
RW
RW
RW
RW
RW
RO
RO
RW
(1)
FAULTMASK
CONTROL
PRIMASK
BASEPRI
SP (R13)
LR (R14)
PC (R15)
PSR
R10
R11
R12
Required
privilege
Either
Privileged
Either
Either
Either
Privileged
Either
Privileged
Privileged
Privileged
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
(2)
Reset
value
Unknown
See
description
Unknown
0xFFFFFFFF
See
description
0x01000000
0x00000000
0x00000000
0x01000000
0x00000000
General-purpose registers
Program status register
Exception mask registers
CONTROL register
PSP
‡
Description
“General-purpose registers” on page 58
“Stack Pointer” on page 58
“Stack Pointer” on page 58
“Link Register” on page 58
“Program Counter” on page 58
“Program Status Register” on page 59
“Application Program Status Register” on
page 60
“Interrupt Program Status Register” on page
61
“Execution Program Status Register” on page
62
“Priority Mask Register” on page 63
MSP
‡
Special registers
‡
Banked version of SP
SAM3U Series
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