SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 74
SAM9263
Manufacturer Part Number
SAM9263
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.SAM9260.pdf
(290 pages)
4.SAM9261.pdf
(248 pages)
5.SAM9263.pdf
(1109 pages)
6.SAM9263.pdf
(51 pages)
Specifications of SAM9263
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Can
1
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
NO
External Bus Interface
2
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- M40800 PDF datasheet #2
- SAM9260 PDF datasheet #3
- SAM9261 PDF datasheet #4
- SAM9263 PDF datasheet #5
- SAM9263 PDF datasheet #6
- Current page: 74 of 290
- Download datasheet (5Mb)
Device Reset
3.2.2
3.2.3
3.2.4
3-4
CPU reset
EmbeddedICE-RT reset
Normal operation
A CPU or warm reset initializes the majority of the ARM9E-S CPU, excluding the
ARM9E-S TAP controller and the EmbeddedICE-RT unit. CPU reset is typically used
for resetting a system that has been operating for some time, for example, watchdog
reset.
Sometimes you might not want to reset the EmbeddedICE-RT unit when resetting the
rest of the ARM9E-S, for example, if EmbeddedICE-RT has been configured to
breakpoint (or capture) fetches from the reset vector.
For CPU reset, both the leading and trailing edges of nRESET must be set up and held
about the rising edge of CLK. This ensures that there are no metastability issues
between the ARM9E-S and the EmbeddedICE-RT unit.
EmbeddedICE-RT reset initializes the state of the ARM9E-S TAP controller and the
EmbeddedICE-RT unit. EmbeddedICE-RT reset is typically used by the Multi-ICE
module for hot connection of a debugger to a system.
EmbeddedICE-RT reset allows initialization of the EmbeddedICE-RT unit without
affecting the normal operation of the ARM9E-S.
For EmbeddedICE-RT reset, both the leading and trailing edges of DBGnTRST must
be set up and held about the rising edge of CLK. This ensures that there are no
metastability issues between the ARM9E-S and the EmbeddedICE-RT unit.
Refer to Clocks and synchronization on page 7-14 for more details of synchronization
between the Multi-ICE and ARM9E-S.
During normal operation, neither CPU reset nor EmbeddedICE-RT reset is asserted.
Copyright © 2000 ARM Limited. All rights reserved.
ARM DDI 0165B
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