SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 110
SAM9263
Manufacturer Part Number
SAM9263
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.SAM9260.pdf
(290 pages)
4.SAM9261.pdf
(248 pages)
5.SAM9263.pdf
(1109 pages)
6.SAM9263.pdf
(51 pages)
Specifications of SAM9263
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Can
1
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
NO
External Bus Interface
2
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- M40800 PDF datasheet #2
- SAM9260 PDF datasheet #3
- SAM9261 PDF datasheet #4
- SAM9263 PDF datasheet #5
- SAM9263 PDF datasheet #6
- Current page: 110 of 284
- Download datasheet (2Mb)
Coprocessor Interface
4.4
4.4.1
4-6
Coprocessor interface handshaking
The coprocessor
Coprocessor interface handshaking is described as follows:
•
•
•
•
•
•
•
The ARM7TDMI core and any coprocessors in the system perform a handshake using
the signals shown in Table 4-2.
These signals are explained in more detail in Coprocessor signaling on page 4-7.
The coprocessor decodes the instruction currently in the Decode stage of its pipeline,
and checks whether that instruction is a coprocessor instruction. A coprocessor
instruction contains a coprocessor number that matches the coprocessor ID of the
coprocessor.
If the instruction currently in the Decode stage is a relevant coprocessor instruction:
1.
2.
The coprocessor can drive CPA and CPB as soon as it decodes the instruction. It does
not have to wait for nCPI to be LOW but it must not commit to execute the instruction
until nCPI has gone LOW.
The coprocessor on page 4-6
The ARM7TDMI processor on page 4-7
Coprocessor signaling on page 4-7
Consequences of busy-waiting on page 4-8
Coprocessor register transfer instructions on page 4-9
Coprocessor data operations on page 4-10
Coprocessor load and store operations on page 4-10.
The coprocessor attempts to execute the instruction.
The coprocessor handshakes with the ARM7TDMI core using CPA and CPB.
Note
Copyright © 1994-2001. All rights reserved.
Signal
nCPI
CPA
CPB
Direction
ARM7TDMI core to coprocessor
Coprocessor to ARM7TDMI core
Coprocessor to ARM7TDMI core
Table 4-2 Handshaking signals
Meaning
NOT coprocessor instruction
Coprocessor absent
Coprocessor busy
ARM DDI 0029G
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