SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 338
SAM9M10
Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9M10.pdf
(59 pages)
4.SAM9M10.pdf
(1398 pages)
Specifications of SAM9M10
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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25.4
25.5
338
Slow Clock RC Oscillator
Slow Clock Selection
SAM9M10
Figure 25-2. Typical Slow Clock Crystal Oscillator Connection
The user has to take into account the possible drifts of the RC Oscillator. More details are given
in the section “DC Characteristics” of the product datasheet.
The AT91SAM9M10 slow clock can be generated either by an external 32,768 Hz crystal or by
the on-chip RC oscillator. The 32,768 Hz crystal oscillator can be bypassed by setting the bit
OSC32BYP to accept an external slow clock on XIN32.
The internal RC oscillator and the 32,768 Hz oscillator can be enabled by setting to 1, respec-
tively, RCEN bit and OSC32EN bit in the System Controller user interface. The OSCSEL
command selects the slow clock source.
Figure 25-3. Slow Clock Selection
RCEN, OSC32EN,OSCSEL and OSC32BYP bits are located in the Slow Clock Control Register
(SCKCR) located at address 0xFFFFFD50 in the backed up part of the System Controller and so
are preserved while VDDBU is present.
After a VDDBU power on reset, the default configuration is RCEN=1, OSC32EN=0 and OSC-
SEL=0, allowing the system to start on the internal RC oscillator.
The programmer controls the slow clock switching by software and so must take precautions
during the switching phase.
XOUT32
XIN32
XIN32
32,768 Hz
Crystal
Slow Clock
Clock Generator
Oscillator
On Chip
RC OSC
XOUT32
GNDOSC
Slow Clock
SLCK
OSCSEL
OSC32EN
OSC32BYP
RCEN
6355D–ATARM–7-Sep-11
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