AD7952 Analog Devices, AD7952 Datasheet
AD7952
Specifications of AD7952
Available stocks
Related parts for AD7952
AD7952 Summary of contents
Page 1
... The device is configured through hardware or via a dedicated write-only serial configuration port for input range and operating mode. The AD7952 contains a high speed 14-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports. A falling edge on CNVST samples the fully differential analog inputs on IN+ and IN− ...
Page 2
... AD7952 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Specifications .................................................................. 5 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Typical Performance Characteristics ........................................... 12 Terminology .................................................................................... 16 Theory of Operation ...................................................................... 17 Overview...................................................................................... 17 Converter Operation.................................................................. 17 Modes of Operation ................................................................... 18 Transfer Functions...................................................................... 18 Typical Connection Diagram ................................................... 18 Analog Inputs ...
Page 3
... kHz kHz kHz kHz kHz Full-scale step Rev Page AD7952 unless otherwise noted. MIN MAX Min Typ Max 14 −V +V REF REF − REF REF − REF REF −4 V ...
Page 4
... AD7952 Parameter INTERNAL REFERENCE Output Voltage Temperature Drift Line Regulation Long-Term Drift Turn-On Settling Time REFERENCE BUFFER REFBUFIN Input Voltage Range EXTERNAL REFERENCE Voltage Range Current Drain TEMPERATURE PIN Voltage Output Temperature Sensitivity Output Resistance DIGITAL INPUTS Logic Levels ...
Page 5
... Rev Page AD7952 unless otherwise noted. MIN MAX Typ Max Unit ns μ 850/1100/1350 850/1100/1350 850/1100/1350 ...
Page 6
... AD7952 Parameter SLAVE SERIAL/SERIAL CONFIGURATION INTERFACE MODES (See Figure 43, Figure 44, and Figure 46) External SDCLK, SCCLK Setup Time External SDCLK Active Edge to SDOUT Delay SDIN/SCIN Setup Time SDIN/SCIN Hold Time External SDCLK/SCCLK Period External SDCLK/SCCLK High External SDCLK/SCCLK Low 1 In warp mode only, the time between conversions is 1 ms; otherwise, there is no required maximum time. ...
Page 7
... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION = 91°C/ 26°C/W. JA Rev Page AD7952 ...
Page 8
... EXT/INT = low, RDC/SDIN = low), these inputs can be used to slow down the internally generated serial data clock that clocks the data output. In other serial modes, these pins are high impedance outputs AGND 1 PIN 1 AVDD 2 AGND 3 4 OB/2C 5 AD7952 WARP 6 TOP VIEW IMPULSE 7 (Not to Scale) SER/PAR ...
Page 9
... Serial Data Output. In all serial modes, this pin is used as the serial data output synchronized to SDCLK. Conversion results are stored in an on-chip register. The AD7952 provides the conversion result, MSB first, from its internal shift register. The data format is determined by the logic level of OB/2C. ...
Page 10
... RESET DI Reset Input. When high, reset the AD7952. Current conversion, if any, is aborted. The falling edge of RESET resets the data outputs to all zeros (with OB/2C = high) and clears the configuration register. See the Digital Interface section. If not used, this pin can be tied to OGND. ...
Page 11
... In all ranges, IN+ must be driven 180° out of phase with IN−. 45 TEMP AO Temperature Sensor Analog Output. When the internal reference is enabled (PDREF = PDBUF = low), this pin outputs a voltage proportional to the temperature of the AD7952. See the Temperature Sensor section. 46 REFBUFIN AI Reference Buffer Input. When using an external reference with the internal reference buffer (PDBUF = low, PDREF = high), applying 2 ...
Page 12
... AD7952 TYPICAL PERFORMANCE CHARACTERISTICS AVDD = DVDD = 5 V; OVDD = 5 V; VCC = 15 V; VEE = − 1.0 0.5 0 –0.5 –1.0 0 4096 8192 CODE Figure 5. Integral Nonlinearity vs. Code 250 200 150 100 50 0 –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 INL DISTRIBUTION (LSB) Figure 6. Integral Nonlinearity Distribution (239 Devices) ...
Page 13
... SNR SINAD –50 –40 –30 –20 –10 INPUT LEVEL (dB) 10 FREQUENCY (kHz) Figure 15. THD, Harmonics, and SFDR vs. Frequency 10V ±5V ±10V –35 – TEMPERATURE (°C) Figure 16. SINAD vs. Temperature AD7952 0 120 110 100 105 125 ...
Page 14
... AD7952 – 10V ±5V ±10V –100 –104 –108 –112 –116 –120 –55 –35 – TEMPERATURE (°C) Figure 17. THD vs. Temperature 1.5 NEGATIVE FULL-SCALE ERROR 1.0 0.5 POSITIVE FULL-SCALE ERROR 0 –0.5 ZERO ERROR –1.0 –1.5 –55 –35 – TEMPERATURE (°C) Figure 18. Zero Error, Positive and Negative Full-Scale Error vs. Temperature ...
Page 15
... TEMPERATURE (°C) Figure 23. Power-Down Operating Currents vs. Temperature 105 Figure 24. Typical Delay vs. Load Capacitance C Rev Page AD7952 OVDD = 2.7V @ 85°C OVDD = 2.7V @ 25°C OVDD = 5V @ 85°C OVDD = 5V @ 25°C 50 100 150 200 C (pF ...
Page 16
... CNVST input to when the input signal is held for a conversion. Transient Response The time required for the AD7952 to achieve its rated accuracy after a full-scale step function is applied to its input. Reference Voltage Temperature Coefficient Reference voltage temperature coefficient is derived from the typical shift of the output voltage at 25° ...
Page 17
... The AD7952 is a very fast, low power, precise, 14-bit ADC using successive approximation, capacitive digital-to-analog (CDAC) converter architecture. The AD7952 can be configured at any time for one of four input ranges and conversion mode with inputs in parallel and serial hardware modes dedicated write-only, SPI-compatible interface via a configuration register in serial software mode. The AD7952 uses Analog Devices’ ...
Page 18
... ADC performs a background calibration during the SAR conversion process. This calibration can drift if the time between conversions exceeds 1 ms, thus causing the first conversion to appear offset. This mode makes the AD7952 ideal for applications where both high accuracy and fast sample rate are required. Normal Mode ...
Page 19
... PDBUF PD RD DGND AGND NOTE 8 Rev Page DIGITAL INTERFACE SUPPLY (2.5V, 3.3V, OR 5V) 10µF OGND MicroConverter MICROPROCESSOR/ BUSY SDCLK SERIAL PORT 1 SDOUT SCCLK SERIAL PORT 2 SCIN SCCS NOTE 7 33Ω D CNVST OB/2C SER/PAR OVDD HW/SW BIPOLAR TEN CLOCK WARP IMPULSE CS RESET AD7952 ® / DSP ...
Page 20
... V range. During the conversion phase, when the switches are opened, the input impedance is limited to C Because the input impedance of the AD7952 is very high, it can be directly driven by a low impedance source without gain error. To further improve the noise filtering achieved by the AD7952 analog input circuit, an external, 1-pole RC filter between the amplifier’ ...
Page 21
... The driver needs to have a THD performance suitable to that of the AD7952. Figure 15 shows the THD vs. frequency that the driver should exceed. The AD8021 meets these requirements and is appropriate for almost all applications. The AD8021 needs external compensation capacitor that should have good linearity as an NPO ceramic or mica type ...
Page 22
... When the internal reference is enabled (PDREF = PDBUF = low), the on-chip temperature sensor output (TEMP) is enabled and can be use to measure the temperature of the AD7952. To improve the calibration accuracy over the temperature range, the output of the TEMP pin is applied to one of the inputs of the analog switch (such as ADG779), and the ADC itself is used to measure its own temperature ...
Page 23
... PD input is a don’t care and should be tied to either high or low. CONVERSION CONTROL The AD7952 is controlled by the CNVST input. A falling edge on CNVST is all that is necessary to initiate a conversion. A detailed timing diagram of the conversion process is shown in Figure 34 ...
Page 24
... RD is generally used to enable the conversion result on the data bus. RESET The RESET input is used to reset the AD7952. A rising edge on RESET aborts the current conversion (if any) and tristates the data bus. The falling edge of RESET resets the AD7952 and clears the data bus and configuration register. See Figure 35 for the RESET timing details ...
Page 25
... Usually, because the AD7952 is used with a fast throughput, this mode is the HI-Z HIGH BYTE most recommended serial mode. In this mode, the serial clock and data toggle at appropriate instances, minimizing potential feedthrough between digital activity and critical conversion decisions ...
Page 26
... AD7952 CS CNVST BUSY t 29 SYNC t 14 SDCLK t 15 SDOUT t 16 CS, RD CNVST BUSY t 17 SYNC SDCLK t 18 SDOUT Figure 41. Master Serial Data Timing for Reading (Read Previous Conversion During Convert) RDC/SDIN = 0 INVSCLK = INVSYNC = 0 EXT/INT = ...
Page 27
... EXT/ INT , INVSCLK, SDIN, SDOUT, SDCLK, and RDERROR. External Clock (SER/ PAR = High, EXT/ INT = High) Setting the EXT/ INT = high allows the AD7952 to accept an externally supplied serial data clock on the SDCLK pin. In this mode, several methods can be used to read the data. The external serial clock is gated by CS ...
Page 28
... AD7952 External Clock Data Read After/During Conversion It is also possible to begin to read data after conversion and continue to read the last bits after a new conversion is initiated. This method allows the full throughput and the use of a slower SDCLK frequency. Again recommended to use a discontinuous SDCLK whenever possible to minimize potential incorrect bit decisions ...
Page 29
... SOFTWARE CONFIGURATION The pins multiplexed on D[13:10] used for software configura- tion are: HW SCIN, SCCLK, and SCCS . The AD7952 is programmed using the dedicated write-only serial configurable port (SCP) for conversion mode, input range selection, output coding, and power-down using the serial configuration register. ...
Page 30
... Figure 47 shows an interface diagram between the AD7952 and the SPI-equipped ADSP-219x. To accommodate the slower speed of the DSP, the AD7952 acts as a slave device, and data must be read after conversion. This mode also allows the daisy-chain feature. The convert command could be initiated in response to an internal timer interrupt ...
Page 31
... Run traces on different but close layers of the board, at right angles to each other, to reduce the effect of feedthrough through the board. The power supply lines to the AD7952 should use as large a trace as possible to provide low impedance paths and reduce the effect of glitches on the power supply lines. Good decoupling is also important to lower the impedance of the supplies presented to the AD7952, and to reduce the magnitude of the supply spikes ...
Page 32
... AD7952BCPZ −40°C to +85°C 1 AD7952BCPZRL −40°C to +85°C 1 AD7952BSTZ −40°C to +85°C 1 AD7952BSTZRL −40°C to +85° EVAL-AD7952CBZ 3 EVAL-CONTROL BRD3 Pb-free part. 2 This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD3 for evaluation/demonstration purposes. ...