AD7680 Analog Devices, AD7680 Datasheet - Page 16

• Manufacturer Part Number: AD7680
• Manufacturer: Analog Devices

Specifications of AD7680

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 100kSPS
• Interface: Ser,SPI
• Analog Input Type: SE-Uni
• Ain Range: Uni Vdd
• Adc Architecture: SAR
• Pkg Type: SOP,SOT

AD7680
POWER VS. THROUGHPUT RATE
By using the power-down mode on the AD7680 when not
converting, the average power consumption of the ADC
decreases at lower throughput rates. Figure 19 shows how as the
throughput rate is reduced, the part remains in its shut-down
state longer, and the average power consumption over time
drops accordingly.
For example, if the AD7680 is operated in a continuous
sampling mode, with a throughput rate of 10 kSPS and an SCLK
of 2.5 MHz (V
down mode between conversions, the power consumption is
calculated as follows. The maximum power dissipation during
normal operation is 6.84 mW (V
time from power-down is 1 μs, and the remaining conversion
time is 8 μs, (using a 20 SCLK transfer), then the AD7680 can
be said to dissipate 6.84 mW for 9 μs during each conversion
cycle. With a throughput rate of 10 kSPS, the cycle time is 100
μs.
For the remainder of the conversion cycle, 91 μs, the part
remains in power-down mode. The AD7680 can be said to
dissipate 1.08 μW for the remaining 91 μs of the conversion
cycle. Therefore, with a throughput rate of 10 kSPS, the average
power dissipated during each cycle is
(9/100) × (6.84 mW) + (91/100) × (1.08 μW) = 0.62 mW
DD
= 3.6 V), and the device is placed in power-
DD
= 3.6 V). If the power-up
Rev. A | Page 16 of 24
Figure 19 shows the power dissipation versus the throughput
rate when using the power-down mode with 3.6 V supplies, a
2.5 MHz SCLK, and a 20 SCLK serial transfer.
0.01
0.1
10
1
0
V
F
SCLK
Power-Down Mode with 20 SCLK Transfer at 3.6 V
DD
= 3.6V
5
= 2.5MHz
Figure 19. Power vs. Throughput Using
10
15
THROUGHPUT (kSPS)
20
25
30
35
40
45
50