AD7678 Analog Devices, AD7678 Datasheet
AD7678
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AD7678 Summary of contents
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... Instrumentation Spectrum analysis Medical instruments GENERAL DESCRIPTION The AD7678 is an 18-bit, 100 kSPS, charge redistribution SAR, fully differential analog-to-digital converter that operates on a single 5 V power supply. The part contains a high speed 18-bit sampling ADC, an internal conversion clock, an internal reference buffer, error correction circuits, and both serial and parallel system interface ports ...
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... Removed Endnote 3 from DC Accuracy; Zero Error Parameter; Table 2 ................................................................... 3 MAX Changes to Endnote 3, Table 2 ........................................................ 4 Moved ESD Caution ......................................................................... 7 Changes to Figure 4 and Table 6 ..................................................... 8 Changes to Evaluating the AD7678’s Performance Section ...... 25 Updated Outline Dimensions ....................................................... 26 Changes to Ordering Guide .......................................................... 26 8/03—Revision 0: Initial Version Digital Interface .......................................................................... 20 ...
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... kHz kHz kHz kHz, –60 dB Input IN Full-Scale Step REF 3 REFBUFIN = 2.5 V 4.05 REFBUFIN 1.8 –1 100 kSPS Throughput Rev Page AD7678 Typ Max Unit Bits +V V REF AVDD + 0 μA 10 μs 100 kSPS 2 +2.5 LSB +1.75 LSB Bits ...
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... AD7678 Parameter DIGITAL INPUTS Logic Levels DIGITAL OUTPUTS 5 Data Format Pipeline Delay POWER SUPPLIES Specified Performance AVDD DVDD OVDD Operating Current AVDD 8 DVDD 8 OVDD 9 TEMPERATURE RANGE Specified Performance 1 See the Analog Inputs section. 2 LSB means Least Significant Bit. With the ±4.096 V input range, 1 LSB is 31.25 μV. ...
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... See Table 1 pF; otherwise, the load maximum. L AD7678 Max Unit ns μ 1.5 μ 1.5 μs μs ns 1.5 μ ...
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... AD7678 Table 4. Serial Clock Timings in Master Read after Convert DIVSCLK[1] DIVSCLK[0] SYNC to SCLK First Edge Delay Minimum Internal SCLK Period Minimum Internal SCLK Period Maximum Internal SCLK HIGH Minimum Internal SCLK LOW Minimum SDOUT Valid Setup Time Minimum SDOUT Valid Hold Time Minimum ...
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... ABSOLUTE MAXIMUM RATINGS Table 5. AD7678 Absolute Maximum Ratings Parameter Analog Inputs 2 2 IN+ , IN– , REF, REFBUFIN, REFGND to AGND Ground Voltage Differences AGND, DGND, OGND Supply Voltages AVDD, DVDD, OVDD AVDD to DVDD, AVDD to OVDD DVDD to OVDD Digital Inputs 3 Internal Power Dissipation 4 Internal Power Dissipation ...
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... In other serial modes, these pins are not used AGND 1 PIN 1 AVDD 2 IDENTIFIER MODE0 3 MODE1 4 D0/OB/2C 5 AD7678 NC 6 TOP VIEW NC 7 (Not to Scale) D1/A0 8 D2/ D4/DIVSCLK[0] D5/DIVSCLK[1] 12 ...
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... Chip Select. When CS and RD are both LOW, the interface parallel or serial output bus is enabled also used to gate the external clock. 33 RESET DI Reset Input. When set to a logic HIGH, reset the AD7678. Current conversion, if any, is aborted. If not used, this pin could be tied to DGND. Rev Page AD7678 ...
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... AD7678 1 Pin No. Mnemonic Type Description Power-Down Input. When set to a logic HIGH, power consumption is reduced and conversions are inhibited after the current one is completed. 35 CNVST DI Start Conversion. If CNVST is held HIGH when the acquisition phase (t edge on CNVST puts the internal sample/hold into the hold state and initiates a conversion. If CNVST is held LOW when the acquisition phase is complete, the internal sample/hold is put into the hold state and a conversion is started immediately ...
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... Aperture delay is a measure of the acquisition performance and is measured from the falling edge of the CNVST input to when the input signal is held for a conversion. Transient Response Transient response is the time required for the AD7678 to achieve its rated accuracy after a full-scale step function is applied to its input. Rev Page ...
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... AD7678 TYPICAL PERFORMANCE CHARACTERISTICS 2.5 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 0 65536 131072 CODE Figure 5. Integral Nonlinearity vs. Code 70000 60158 59966 60000 50000 40000 30000 20000 10000 5919 20015 20016 20017 20018 20019 2001A2001B2001C2001D 2001E CODE IN HEX Figure 6. Histogram of 131,072 Conversions of a ...
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... TEMPERATURE (C) Figure 14. THD and Harmonics vs. Temperature AVDD DVDD OVDD 1 100 1k 10k 10 SAMPLING RATE (SPS) Figure 15. Operating Current vs. Sampling Rate DVDD OVDD –35 – TEMPERATURE ( C) AD7678 105 125 03084-0-019 100k 03084-0-020 AVDD 105 125 03084-0-021 ...
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... AD7678 GAIN ERROR ZERO ERROR –10 –20 –30 –40 –50 –55 –35 – TEMPERATURE ( C) Figure 17. Zero Error and Gain Error vs. Temperature 65 85 105 125 03083-0-022 Rev Page OVDD = 2.7V @ 85° OVDD = 2.7V @ 25°C OVDD = 5V @ 85°C OVDD = 5V @ 25° ...
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... ADC that does not exhibit any pipeline or latency, making it ideal for multiple multiplexed channel applications. The AD7678 can be operated from a single 5 V supply and can be interfaced to either digital logic housed in a 48-lead LQFP tiny 48-lead LFCSP package that offers space savings and allows for flexible configurations as either a serial or parallel interface ...
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... AD7678 Transfer Functions Except in 18-bit interface mode, the AD7678 offers straight binary and twos complement output coding when using OB See Figure 20 and Table 8 for the ideal transfer characteristic. 111...111 111...110 111...101 000...010 000...001 000...000 – ...
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... Resistors R+ and R– are typically 3 k and are S is typically 60 pF and mainly S 25 SNR 20 log LOSS 625 – 3dB is the –3 dB input bandwidth in MHz of the AD7678 AD7678 . S N ...
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... LSB/°C. Power Supply The AD7678 uses three sets of power supply pins: an analog 5 V /2. supply (AVDD), a digital 5 V core supply (DVDD), and a digital output interface supply (OVDD). The OVDD supply defines the output logic level and allows direct interface with any logic working between 2 ...
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... For other applications, conversions can be automatically initiated. If CNVST is held low when BUSY is low, the AD7678 controls the acquisition phase and then automatically initiates a new conversion. By keeping CNVST low, the AD7678 keeps the conversion process running by itself ...
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... BUS Figure 29. Master Parallel Data Timing for Reading (Continuous Read) PARALLEL INTERFACE The AD7678 is configured to use the parallel interface with an 18-bit, a 16-bit 8-bit bus width, according to Table 7. The data can be read either after each conversion, which is during the next acquisition phase, or during the following conversion, as shown in Figure 30 and Figure 31, respectively ...
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... RDC/SDIN input, the data can be read after each conversion or during the following conversion. Figure 33 and Figure 34 show the detailed timing diagrams of these two modes. Usually, because the AD7678 is used with a fast throughput, the mode master read during conversion is the most recommended serial mode. ...
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... Figure 35 and Figure 36 show the detailed timing diagrams of these methods. While the AD7678 is performing a bit decision important that voltage transients not occur on digital input/output pins or degradation of the conversion result could occur. This is ...
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... D16 t 16 Figure 36. Slave Serial Data Timing for Reading (Read Previous Conversion during Convert) Rev Page INVSCLK = D15 D1 D0 X15 X1 X0 INVSCLK = D15 D1 D0 AD7678 19 20 X17 X16 Y17 Y16 03084-0-041 03084-0-042 ...
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... Figure 38 shows an interface diagram between the AD7678 and the SPI equipped ADSP-219x. To accommodate the slower speed of the DSP, the AD7678 acts as a slave device, and data must be read after conversion. This mode also allows the daisy- chain feature. The convert command could be initiated in response to an internal timer interrupt ...
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... This will reduce the effect of feedthrough through the board. The power supply lines to the AD7678 should use as large a trace as possible to provide low impedance paths and reduce the effect of glitches on the power supply lines. Good decoupling is also important to lower the supply’ ...
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... ORDERING GUIDE Model Temperature Range 1 AD7678ASTZ –40°C to +85°C 1 AD7678ASTZRL –40°C to +85°C 1 AD7678ACPZ –40°C to +85°C 1 AD7678ACPZRL –40°C to +85°C 2 EVAL-AD7678CBZ 1, 3 EVAL-CONTROL BRD2Z 1, 3 EVAL-CONTROL BRD3Z 1, 3 EVAL-CED1Z RoHS Compliant Part. 2 This board can be used as a standalone evaluation board or in conjunction with the a capture board for evaluation/demonstration purposes. ...
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... NOTES Rev Page AD7678 ...
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... AD7678 NOTES ©2003–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective companies. D03084-0-6/09(A) Rev Page ...