AD7665 Analog Devices, AD7665 Datasheet - Page 5

• Manufacturer Part Number: AD7665
• Manufacturer: Analog Devices

Specifications of AD7665

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 570kSPS
• Interface: Par,Ser,SPI
• Analog Input Type: Diff-Bip,Diff-Uni
• Ain Range: Bip (Vref),Bip (Vref) x 2,Bip (Vref) x 4,Uni (Vref),Uni (Vref) x 2,Uni (Vref) x 4
• Adc Architecture: SAR
• Pkg Type: CSP,QFP

REV.
ABSOLUTE MAXIMUM RATINGS
Analog Inputs
Ground Voltage Differences
Supply Voltages
Internal Power Dissipation
Internal Power Dissipation
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range
1
2
3
4
Figure 1. Load Circuit for Digital Interface Timing, SDOUT,
SYNC, SCLK Outputs, C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD7665 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
See Analog Inputs section.
Specification is for device in free air: 48-Lead LQFP: q
Specification is for device in free air: 48-Lead LFCSP: q
IND
INA, REF, INGND, REFGND
AGND, DGND, OGND . . . . . . . . . . . . . . . . . . . . . ±0.3 V
AVDD, DVDD, OVDD . . . . . . . . . . . . . . . . –0.3 V to + 7 V
AVDD to DVDD, AVDD to OVDD . . . . . . . . . . . . . . ±7 V
DVDD to OVDD . . . . . . . . . . . . . . . . . . . . . –0.3 V to + 7 V
Digital Inputs . . . . . . . . . . . . . . . . –0.3 V to DVDD + 0.3 V
(Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
. . . . . . . . . . . . . . . . . . . . . AGND – 0.3 V to AVDD + 0.3 V
C
2
, INC
*
TO OUTPUT
IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
C
L
OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.
2
, INB
PIN
2
. . . . . . . . . . . . . . . . . . . . –11 V to +30 V
C
60pF
L
3
4
L
= 10 pF
. . . . . . . . . . . . . . . . . . . . 700 mW
. . . . . . . . . . . . . . . . . . . . . . 2.5 W
*
500 A
1.6mA
I
I
1
OH
OL
JA
= 91°C/W, q
JC
= 26°C/W.
1.4V
JC
= 30°C/W.
–5–
NC = NO CONNECT
D2/DIVSCLK[0]
D3/DIVSCLK[1]
Figure 2. Voltage Reference Levels for Timing
BYTESWAP
The exposed paddle should be connected to GND.
IMPULSE
SER/PAR
OB/2C
WARP
AGND
AVDD
t
DELAY
NC
0.8V
D0
D1
10
11
12
1
2
3
4
5
6
7
8
9
PIN CONFIGURATION
48 47 46 45 44
13 14 15 16 17 18 19 20 21 22 23 24
PIN 1
IDENTIFIER
ST-48 and CP-48
2V
0.8V
(Not to Scale)
TOP VIEW
AD7665
43 42 41 40
2V
39 38 37
t
DELAY
2V
0.8V
AD7665
36
35
34
33
32
31
30
29
28
27
26
25
AGND
CNVST
PD
RESET
CS
RD
DGND
BUSY
D15
D14
D13
D12