AD1556 Analog Devices, AD1556 Datasheet

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AD1556

Manufacturer Part Number
AD1556
Description
Digital Filter/Decimator for 24-Bit Sigma-Delta A/D Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD1556

Resolution (bits)
24bit
# Chan
2
Sample Rate
256kSPS
Interface
Byte,Ser
Analog Input Type
Diff-Bip,SE-Bip
Ain Range
Bip 2.25V/(PGA Gain)
Adc Architecture
Sigma-Delta,Sigma-Delta Modulator
Pkg Type
LCC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD1556ASZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
a
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
GENERAL DESCRIPTION
The AD1555 is a complete sigma-delta modulator, combined
with a programmable gain amplifier intended for low frequency,
REV. B
AIN (+)
AIN (–)
TIN (+)
TIN (–)
FEATURES
AD1555
AD1556
APPLICATIONS
Seismic Data Acquisition Systems
Chromatography
Automatic Test Equipment
Fourth Order - Modulator
Large Dynamic Range
Low Input Noise: 80 nV rms @ 4 ms with
Low Distortion: –111 dB Max, –120 dB Typical
Low Intermodulation: 122 dB
Sampling Rate at 256 kSPS
Very High Jitter Tolerance
No External Antialias Filter Required
Programmable Gain Front End
Input Range:
Robust Inputs
Gain Settings: 1, 2.5, 8.5, 34, 128
Common-Mode Rejection (DC to 1 kHz)
77 mW Typical Low Power Dissipation
Standby Modes
FIR Digital Filter/Decimator
Serial or Parallel Selection of Configuration
Output Word Rates: 250 SPS to 16 kSPS
6.2 mW Typ Low Power Dissipation
70 W in Standby Mode
Reference Design and Evaluation Board with
116 dB Min, 120 dB Typical @ 1 ms
117 dB Typical @ 0.5 ms
Gain of 34,128
93 dB Min, 101 dB Typical @ Gain of 1
Software Available
AGND1
MUX
PGA
REFIN
PGAOUT
2.25 V
REF DIVIDER
REFCAP2
MODIN
AGND2
REFCAP1
DAC
AD1555
+V
FILTER
LOOP
A
AGND3
FUNCTIONAL BLOCK DIAGRAM
–V
A
MODE CONTROL
OVERVOLTAGE
DETECTION
GENERATION
LOGIC
CLOCK
V
L
DGND
high dynamic range measurement applications. The AD1555
outputs a ones-density bitstream proportional to the analog
input. When used in conjunction with the AD1556 digital filter/
decimator, a high performance ADC is realized.
The continuous-time analog modulator input architecture avoids
the need for an external antialias filter. The programmable gain
front end simplifies system design, extends the dynamic range,
and reduces the system board area. Low operating power and
standby modes makes the AD1555 ideal for remote battery-pow-
ered data acquisition systems.
The AD1555 is fabricated on Analog Devices’ BiCMOS process
that has high performance bipolar devices along with CMOS
transistors. The AD1555 and AD1556 are packaged, respectively,
in 28-lead PLCC and 44-lead MQFP packages and are specified
from –55°C to +85°C (AD1556 and AD1555 B Grade) and from
0°C to 85°C (AD1555 A Grade).
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
CB0...CB4
MDATA
MFLG
MCLK
Figure 1. FFT Plot, Full-Scale AIN Input, Gain of 1
TDATA
CSEL
–100
–120
–140
–160
–180
–200
–20
–40
–60
–80
0
0
PGA0...PGA4
50
CONTROL
CLKIN SYNC
CLOCK DIVIDER
INPUT
PGA
MUX
100
150
with Low Noise PGA
CONFIGURATION
BW0...BW2 RESET PWRDN GND V
H/S
AD1555/AD1556
FREQUENCY – Hz
DIGITAL
200
FILTER
REGISTER
24-Bit - ADC
250
REGISTER
REGISTER
STATUS
DATA
300
ERROR
© Analog Devices, Inc., 2002
AD1556
350
INPUT SHIFT
REGISTER
f
SNR = 116.7dB
THD = –120.6dB
IN
OUTPUT
= 24.4Hz
DATA
400
MUX
www.analog.com
450
L
500
DIN
SCLK
CS
R/W
DOUT
DRDY
RSEL

Related parts for AD1556

AD1556 Summary of contents

Page 1

... CMOS transistors. The AD1555 and AD1556 are packaged, respectively, in 28-lead PLCC and 44-lead MQFP packages and are specified from –55°C to +85°C (AD1556 and AD1555 B Grade) and from 0°C to 85°C (AD1555 A Grade). FUNCTIONAL BLOCK DIAGRAM ...

Page 2

... AD1555/AD1556 AD1555–SPECIFICATIONS Parameter Notes PGA Gain Settings 1, 2.5, 8.5, 34, 128 AC ACCURACY 1 Dynamic Range PGA Gain of 1 PGA Gain of 2.5 PGA Gain of 8.5 PGA Gain of 34 PGA Gain of 128 2 Total Harmonic Distortion PGA Gain of 1 PGA Gain of 2.5 PGA Gain of 8.5 PGA Gain of 34 PGA Gain of 128 ...

Page 3

... AD1556 output word rate, the inverse of the sampling rate. See Tables I, Ia, Ib for other output 2. 5.25 V; CLKIN = 1.024 MHz Notes All Filters Except F =16 kHz O F =16 kHz SINK I = – ...

Page 4

... AD1555/AD1556 Input and Gain MODIN Input Range 1.6 V rms Dynamic Range kHz (1/16 ms kHz (1/8 ms kHz (1/4 ms kHz (1/2 ms) 117 kHz (1 ms) 120 500 Hz (2 ms) 123 250 Hz (4 ms) 126 dB O Equivalent Input Noise ...

Page 5

... MCLK frequency. 1.6mA OUTPUT PIN C L 50pF I 500 A OH Figure 2. Load Circuit for Digital Interface Timing –5– AD1555/AD1556 = 5 V 5%, AD1556 unless otherwise noted MIN MAX Min Typ Max 0.975 1.024 1.075 ...

Page 6

... AD1555/AD1556 CLKIN t 1 SYNC t 3 MCLK ( MDATA TDATA t 10 RESET CLKIN SYNC DRDY ERROR Figure 4. AD1556 RESET, DRDY, and Overwrite Timings DATA VALID VALID Figure 3. AD1555/AD1556 Interface Timing –6– ...

Page 7

... DOUT SCLK R SCLK t 31 MSB DIN REV. B MSB MSB– Figure 5. Serial Read Timing MSB–1 Figure 6. Serial Write Timing –7– AD1555/AD1556 HI-Z LSB+1 LSB LSB+1 LSB ...

Page 8

... AGND . . . . . . . . . . . . . . . . . . . . . . . – +0 DGND . . . . . . . . . . . . . . . . . . . . . . . . –0 Ground Voltage Differences DGND, AGND1, AGND2, AGND3 . . . . . . . . . . . ± 0.3 V Digital Inputs . . . . . . . . . . . . . . . . . . . . –0 Internal Power Dissipation AD1555 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8 W AD1556 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8 W Model AD1555AP AD1555APRL AD1555BP AD1555BPRL AD1556AS AD1556ASRL EVAL-AD1555/AD1556EB AD1555/56-REF *Contact factory for extended temperature range. ...

Page 9

... PGA1 3 PGA2 4 PGA3 5 AD1556 PGA4 6 TOP VIEW (Not to Scale) BW0 7 BW1 8 9 BW2 10 H CONNECT –9– AD1555/AD1556 REFIN REFCAP2 REFCAP1 AGND3 –V A – CLKIN 31 SYNC 30 TDATA 29 CSEL PWRDN ...

Page 10

... AD1555. When used with the AD1556, these pins are generally directly tied to the CB0–CB4 output pins of the AD1556. CB0–CB2 are generally used to set the PGA gain or cause it to enter in the PGA standby mode (refer to Table III). CB3 and CB4 select the mux input voltage applied to the PGA as described in Table III ...

Page 11

... CLKIN Clock Input. The clock input signal, nominally 1.024 MHz, provides the necessary clock for the AD1556. This clock frequency is divided by four to generate the MCLK signal for the AD1555. 35 MCLK Modulator Clock. Provides the modulator sampling clock frequency. The modulator always samples at one-fourth the CLKIN frequency ...

Page 12

... IMD is expressed in decibels. OFFSET The offset is the difference between the ideal midscale input volt- age (0 V) and the actual voltage producing the midscale output code (code 000000H) at the output of the AD1556. The offset specification is referred to the output. This offset is intentionally /2. The O set at a nominal value of – ...

Page 13

... TPC 5. Dynamic Range Distribution (272 Units) 150 f = 24.4Hz IN SNR = 68.2dB 140 THD = –120dB 130 120 110 100 90 3000 3500 4000 –55 TPC 6. Common-Mode Rejection vs. Temperature –13– AD1555/AD1556 2 8 128 –35 – 105 TEMPERATURE – C –121 –119 –117 –118 DYNAMIC RANGE – ...

Page 14

... TPC 11. AD1556 Pass Band Ripple, F 0.20 0.15 0.10 0.05 0.00 –0.05 –0.10 –0.15 –0.20 100 125 0 = 250 Hz (4 ms) TPC 12. AD1556 Pass Band Ripple –14– 50 100 150 200 250 FREQUENCY – 500 Hz (2 ms) O 100 200 300 400 500 FREQUENCY – kHz (1 ms) ...

Page 15

... FREQUENCY – Hz TPC 14. AD1556 Pass Band Ripple, F REV. B 0.20 0.15 0.10 0.05 0.00 –0.05 –0.10 –0.15 –0.20 1500 2000 kHz (1/4 ms) TPC 15. AD1556 Pass Band Ripple 3000 4000 = 8 kHz (1/8 ms) O –15– AD1555/AD1556 4000 6000 8000 2000 FREQUENCY – kHz (1/16 ms) O ...

Page 16

... F The AD1555 operates from a dual analog supply (± 5 V), while the digital part of the AD1555 operates from supply. The AD1556 operates from a single 3 supply. Each device exhibits low power dissipation and can be configured for standby mode. Figure 7 illustrates a typical operating circuit. ...

Page 17

... CB0 to CB4 according to the Table III. This table is only valid when MCLK is toggling; otherwise, the AD1555 is powered down. When used in combination with the AD1556, this control bus could either be loaded by hardware (H/S pin high) or via the serial interface of the AD1556 (H/S pin low). ...

Page 18

... TPC 3. This high frequency noise is attenuated by the AD1556 digital filter. However, when the output word rate (OWR) of the AD1556 is higher than 4 kHz (–3 dB frequency is higher than 1634 Hz), the efficiency of this filtering is limited and slightly reduces the dynamic range, as shown in the Table I ...

Page 19

... Architecture The functional block diagram of the filter portion of the AD1556 is given in Figure 10. The basic architecture is a two-stage filter. The second stage has a decimation ratio of 4 for all filters except ...

Page 20

... CB0 Configuring and Interfacing the AD1556 The AD1556 configuration can be loaded either by hardware (H/S pin high) or via the serial interface of the AD1556 (H/S pin low). To operate with the AD1556, the CLKIN clock must be kept running at the nominal frequency of 1.024 MHz. Table V gives the description of each bit of the configuration register and Table VI defines the selection of the filter bandwidth ...

Page 21

... However, care should still be taken with regard to grounding layout. The printed circuit board that houses the AD1555 and the AD1556 should be designed so the analog and digital sections are separated and confined to certain areas of the board. This facilitates the use of ground planes that can be easily separated. ...

Page 22

... PGA Gain Select PGA Gain Select PGA Gain Select Evaluating the AD1555/AD1556 Performance Performances of the AD1555/AD1556 can be evaluated with the evaluation board EVAL-AD1555/AD1556EB. The evaluation board package includes a fully assembled and tested evaluation board, documentation, and software for controlling the board from a PC via the PC printer port. – ...

Page 23

... MAX SQ 0.390 (9.90) 0.041 (1.03) 0.029 (0.73 SEATING PLANE TOP VIEW (PINS DOWN) 11 0.010 (0.25 MAX 0.009 (0.23) 0.005 (0.13) 0.018 (0.45) 0.031 (0.80) BSC 0.012 (0.30) 0.083 (2.10) 0.077 (1.95) –23– AD1555/AD1556 0.025 (0.63) 0.015 (0.38) 0.021 (0.53) 0.013 (0.33) 0.430 (10.92) 0.390 (9.91) 0.032 (0.81) 0.026 (0.66) 0.040 (1.01) 0.025 (0.64 0.315 (8.00) REF 23 ...

Page 24

–24– ...

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