AD7812 Analog Devices, AD7812 Datasheet - Page 10

• Manufacturer Part Number: AD7812
• Description: 10-Bit, 8-Channel, 350 kSPS, Serial A/D Converter
• Manufacturer: Analog Devices

Specifications of AD7812

• Resolution (bits): 10bit
• # Chan: 8
• Sample Rate: 350kSPS
• Interface: Ser
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: (Vref) p-p,Uni (Vref)
• Adc Architecture: SAR
• Pkg Type: DIP,SOIC,SOP

AD7811/AD7812
CIRCUIT DESCRIPTION
Converter Operation
The AD7811 and AD7812 are successive approximation analog-
to-digital converters based around a charge redistribution DAC.
The ADCs can convert analog input signals in the range 0 V to
V
Figure 2 shows the ADC during its acquisition phase. SW2 is
closed and SW1 is in position A, the comparator is held in a
balanced condition and the sampling capacitor acquires the
signal on V
When the ADC starts a conversion, see Figure 3, SW2 will
open and SW1 will move to position B causing the comparator
to become unbalanced. The Control Logic and the Charge
Redistribution DAC are used to add and subtract fixed amounts
of charge from the sampling capacitor to bring the comparator
back into a balanced condition. When the comparator is rebal-
anced, the conversion is complete. The Control Logic generates
the ADC output code. Figure 10 shows the ADC transfer
function.
TYPICAL CONNECTION DIAGRAM
Figure 4 shows a typical connection diagram for the AD7811/
AD7812. The AGND and DGND are connected together at
the device for good noise suppression. The serial interface is
implemented using three wires with RFS/TFS connected to
CONVST see Serial Interface section for more details. V
connected to a well decoupled V
input range of 0 V to V
sharing a serial bus with another AD7811 or AD7812 then A0
(package address pin) should be hardwired low. The default
power up value of the package address bit in the control register
is 0. For applications where power consumption is of concern,
the automatic power down at the end of a conversion should be
used to improve power performance. See Power-Down Options
section of the data sheet.
V
DD
V
IN
IN
. Figures 2 and 3 show simplified schematics of the ADC.
A
A
AGND
SW1
AGND
SW1
IN
.
B
B
ACQUISITION
CAPACITOR
V
CONVERSION
SAMPLING
DD
V
PHASE
CAPACITOR
SAMPLING
PHASE
DD
/3
DD
/3
. If the AD7811 or AD7812 is not
SW2
DD
SW2
pin to provide an analog
COMPARATOR
COMPARATOR
REDISTRIBUTION
REDISTRIBUTION
CHARGE
CONTROL
CHARGE
CONTROL
LOGIC
DAC
CLOCK
OSC
DAC
LOGIC
CLOCK
OSC
REF
is
Analog Input
Figure 5 shows an equivalent circuit of the analog input struc-
ture of the AD7811 and AD7812. The two diodes D1 and D2
provide ESD protection for the analog inputs. Care must be
taken to ensure that the analog input signal never exceeds the
supply rails by more than 200 mV. This will cause these diodes
to become forward biased and start conducting current into
the substrate. 20 mA is the maximum current these diodes can
conduct without causing irreversible damage to the part. How-
ever, it is worth noting that a small amount of current (1 mA)
being conducted into the substrate due to an overvoltage on an
unselected channel can cause inaccurate conversions on a
selected channel. The capacitor C2 in Figure 5 is typically about
4 pF and can primarily be attributed to pin capacitance. The
resistor R1 is a lumped component made up of the on resistance
of a multiplexer and a switch. This resistor is typically about
125 Ω. The capacitor C1 is the ADC sampling capacitor and
has a capacitance of 3.5 pF.
The analog inputs on the AD7811 and AD7812 can be config-
ured as single ended with respect to analog ground (AGND),
as pseudo differential with respect to a common, and also as
pseudo differential pairs—see Control Register section.
2.7V TO 5.5V
SUPPLY
INPUT
0V TO
V
REF
V
IN
10 F
C2
4pF
0.1 F
V
V
DGND
V
AGND
IN1
IN2
V
IN4(8)
DD
D2
V
D1
CONVERSION PHASE – SWITCH OPEN
DD
TRACK PHASE – SWITCH CLOSED
AD7811/
AD7812
V
REF
C
CONVST
REF
125
SCLK
R1
DOUT
RFS
TFS
DIN
A0
10nF
3.5pF
C1
THREE-WIRE
SERIAL
INTERFACE
V
DD
/3
µC/µP