AD5725 Analog Devices, AD5725 Datasheet

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AD5725

Manufacturer Part Number
AD5725
Description
Quad, 12-Bit, Parallel Input, Unipolar/Bipolar, Voltage Output DAC
Manufacturer
Analog Devices
Datasheet

Specifications of AD5725

Resolution (bits)
12bit
Dac Update Rate
144kSPS
Dac Settling Time
7µs
Max Pos Supply (v)
+15V
Single-supply
Yes
Dac Type
Voltage Out
Dac Input Format
Par

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FEATURES
+5 V to ±15 V operation
Unipolar or bipolar operation
±0.5 LSB max INL error, ±1 LSB max DNL error
Settling time: 10 μs max (10 V step)
Double-buffered inputs
Simultaneous updating via LDAC
Asynchronous CLR to zero/mid scale
Readback
Operating temperature range: −40°C to +85°C
iCMOS
APPLICATIONS
Industrial automation
Closed-loop servo control, process control
Automotive test and measurement
Programmable logic controllers
GENERAL DESCRIPTION
The AD5725 is a quad, 12-bit, parallel input, voltage output
digital-to-analog converter that offers guaranteed monotonicity,
integral nonlinearity (INL) of ±0.5 LSB maximum and 10 μs
maximum settling time.
Output voltage swing is set by two reference inputs, V
V
positive voltage, the DAC provides a unipolar positive output
range. A similar configuration with V
negative voltage provides a unipolar negative output range.
Bipolar outputs are configured by connecting both V
V
ranges has advantages over the bipolar offsetting methods
because it is not dependent on internal and external resistors
with different temperature coefficients.
iCMOS® Process Technology
For analog systems designers within industrial/instrumentation equipment OEMs who need high performance ICs at higher-voltage levels, iCMOS is a technology
platform that enables the development of analog ICs capable of 30 V and operating at ±15 V supplies while allowing dramatic reductions in power consumption and
package size, and increased ac and dc performance.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
REFN
REFN
. By setting the V
to nonzero voltages. This method of setting output voltage
®
process technology
REFN
input to 0 V and the V
REFP
at 0 V and V
REFP
REFP
to a
REFP
REFN
and
and
Unipolar/Bipolar, Voltage Output DAC
at a
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Digital controls allow the user to load or read back data from
any DAC, load any DAC, and transfer data to all DACs at
one time.
The AD5725 is available in a 28-lead SSOP package. It can be
operated from a wide variety of supply and reference voltages,
with supplies ranging from single +5 V to ±15 V, and references
from +2.5 V to ±10 V. Power dissipation is less than 270 mW
with ±15 V supplies and only 40 mW with a +5 V supply.
Operation is specified over the temperature range of −40°C
to +85°C.
DB11
R/W
DB0
CS
A0
A1
TO
V
L
Quad, 12-Bit, Parallel Input,
REGISTER
CONTROL
AD5725
LOGIC
12
AV
AND
I/O
FUNCTIONAL BLOCK DIAGRAM
SS
DGND
AV
©2007–2008 Analog Devices, Inc. All rights reserved.
12
DD
REG A
REG B
REG C
REG D
INPUT
INPUT
INPUT
INPUT
CLR
Figure 1.
REG A
REG B
REG C
REG D
DAC
DAC
DAC
DAC
LDAC
12
12
12
12
V
REFN
DAC A
DAC B
DAC C
DAC D
V
REFP
AD5725
www.analog.com
V
V
V
V
OUTA
OUTB
OUTC
OUTD

Related parts for AD5725

AD5725 Summary of contents

Page 1

... DB11 Digital controls allow the user to load or read back data from any DAC, load any DAC, and transfer data to all DACs at one time. The AD5725 is available in a 28-lead SSOP package. It can be and operated from a wide variety of supply and reference voltages, REFP to a with supplies ranging from single + ± ...

Page 2

... AD5725 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 AC Performance Characteristics ................................................ 5 , Timing Characteristics ............................................................... 6 Absolute Maximum Ratings ............................................................ 8 ESD Caution .................................................................................. 8 Pin Configuration and Function Descriptions ............................. 9 Typical Performance Characteristics ........................................... 10 Terminology .................................................................................... 14 REVISION HISTORY 12/08—Rev Rev. A Changes to Figure 26 ...................................................................... 13 7/07—Revision 0: Initial Version   ...

Page 3

... kΩ L Typically 1.5 mA Typically 2 mA −3 dB p-p REFP kΩ 100 2 5.5 V, JEDEC compliant 25° 25° 0 −1 14.25 V ≤ AV ≤ 15. Outputs unloaded 2.5 V, typically 2.125 mA REFP Outputs unloaded, typically 1.625 mA AD5725 1 ...

Page 4

... AD5725 −5 V/0 V, DGND = otherwise noted. Table 2. Parameter ACCURACY Resolution Relative Accuracy (INL) Differential Nonlinearity (DNL) Zero-Scale Error 2 Zero-Scale TC Full-Scale Error Full-Scale TC 2 REFERENCE INPUT V REFP 3 Reference Input Range 2 Input Current V REFN 3 Reference Input Range 2 Large Signal Bandwidth ...

Page 5

... V/+2 REFP REFN A Grade B Grade Unit 10 10 μs typ 7 7 μs typ 2.2 2.2 V/μs typ typ 5 5 nV-s typ Rev Page AD5725 = −10 V/−2.5 V All specifications L Test Conditions/Comments To 0.01 step kΩ 0.01%, 2.5 V step kΩ L 10% to 90% ...

Page 6

... AD5725 1, 2 TIMING CHARACTERISTICS V/+ −5 V/0 V/−15 V, DGND = unless otherwise noted. MIN MAX Table 4. Parameter Limit WCS WDS t 0 WDH t 10 LDW t 10 RESET ...

Page 7

... Figure 4. Single Buffer Mode Timing 10ns ADDRESS ADDRESS ADDRESS ONE TWO THREE t WDS DATA1 DATA2 DATA3 VALID VALID VALID Figure 5. Double Buffer Mode Timing AD5725 t WH ADDRESS FOUR WDH DATA4 VALID t WH ADDRESS FOUR LDW t WDH ...

Page 8

... AD5725 ABSOLUTE MAXIMUM RATINGS T = 25°C unless otherwise noted. Transient currents 100 mA do not cause SCR latch-up. Table 5. Parameter AV to DGND DGND DGND L Current into Any Pin Digital Pin Voltage to DGND Operating Temperature Range ...

Page 9

... Negative Analog Supply Pin. Voltage ranges from − DGND Digital Ground Pin. 6 CLR Active Low Input. Sets input registers and DAC registers to zero scale (0x000) for the AD5725-1 or midscale (0x800) for the AD5725. 7 LDAC Active Low Load DAC Input. 8 DB0 Data Bit 0 (LSB) ...

Page 10

... AD5725 TYPICAL PERFORMANCE CHARACTERISTICS 1 +15V –15V 0 –10V REFN T = 25°C 0.6 A 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1 (V) REFP Figure 7. DNL vs REFP SUPPLY 0.05 0 –0.05 –0.10 –0. –0. REFN T = 25°C A –0.25 1.0 1.2 1.4 1.6 1.8 2.0 2.2 V (V) REFP Figure 8. DNL vs. V ...

Page 11

... V) 1.7995 AV AV 1.5995 1.3995 1.1995 0.9995 0.7995 0.5995 0.3995 0.1995 –0.0005 Rev Page AD5725 +85°C +25°C –40°C = +15V DD = –15V SS = +10V = –10V 500 1000 1500 2000 2500 3000 3500 DAC (Code) Figure 16. INL vs. DAC Code +85°C +25° ...

Page 12

... AD5725 +15V –15V +10V REFP –10V REFN T = 25° 0.01 0.1 1 LOAD RESISTANCE (kΩ) Figure 19. Output Voltage Swing vs. Resistive Load 2 0 –2 –4 –6 –8 – +15V –15V SS – ± 100mV REFP V = –10V REFN – ...

Page 13

... M 2s Figure 25. Broadband Noise 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0 CH1 0V Rev Page AD5725 0x800 → 0x7FF (±15V SUPPLY) 0x7FF → 0x800 (±15V SUPPLY) 0x800 → 0x7FF (±5V SUPPLY) 0x7FF → 0x800 (±5V SUPPLY) 100 200 300 400 500 600 700 800 900 TIME (ns) Figure 26 ...

Page 14

... A typical DNL vs. code plot can be seen in Figure 17. Monotonicity A DAC is monotonic if the output either increases or remains constant for increasing digital input code. The AD5725 is monotonic over its full operating temperature range. Full-Scale Error Full-scale error is a measure of the output error when full-scale code is loaded to the DAC register ...

Page 15

... THEORY OF OPERATION The AD5725 is a quad voltage output, 12-bit parallel input DAC featuring a 12-bit data bus with readback capability. The AD5725 operates from single or dual supplies ranging from + ±15 V. The output voltage range is set by the reference voltages applied at the V and V pins ...

Page 16

... AD5725 Table 7. AD5725 Logic Truth Table A1 A0 R/W CS CLR Low Low Low Low High Low High Low Low High High Low Low Low High High High Low Low High Low Low Low Low High Low High Low Low High High Low Low ...

Page 17

... It does not supply current to the device. If the readback function is not used, V can be left open-circuit. While V L not supply current to the AD5725, it does supply current to the digital outputs when the readback function is used. REFERENCE CONFIGURATION Output voltage ranges can be configured as either unipolar or bipolar, and within these choices, a wide variety of options exists ...

Page 18

... AD5725 Figure 29 shows the AD5725 configured for − operation. An ADR01 and OP1177 are configured to produce a −10 V output, which is connected directly to V reference voltage. +15V V +15V IN ADR01 AV DD TEMP V REFP 0.1µF AD5725 10µF V REFN AV SS 0.2µF –15V 0V TO –10V OPERATION Figure 29. Unipolar − ...

Page 19

... AD5725ARSZ-1REEL 1 −40°C to +85°C 1 AD5725ARSZ-500RL7 −40°C to +85°C AD5725ARSZ-REEL 1 −40°C to +85°C 1 AD5725BRSZ-1500RL7 −40°C to +85°C 1 AD5725BRSZ-1REEL −40°C to +85°C 1 AD5725BRSZ-500RL7 −40°C to +85°C 1 AD5725BRSZ-REEL −40°C to +85° RoHS Compliant Part. 10.50 10.20 9. 5.60 5.30 8.20 5.00 7.80 7 ...

Page 20

... AD5725 NOTES ©2007–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06442-0-12/08(A) Rev Page ...

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