AD5446 Analog Devices, AD5446 Datasheet - Page 4

• Manufacturer Part Number: AD5446
• Description: 14-Bit High Bandwidth Multiplying DAC with Serial Interface
• Manufacturer: Analog Devices

Specifications of AD5446

• Resolution (bits): 14bit
• Dac Update Rate: 2.7MSPS
• Dac Settling Time: 80ns
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Ser,SPI

AD5444/AD5446
Parameter
DYNAMIC PERFORMANCE
POWER REQUIREMENTS
1
Guaranteed by design and characterization; not subject to production test.
Reference Multiplying Bandwidth
Multiplying Feedthrough Error
Output Voltage Settling Time
Digital Delay
10%-to-90% Settling Time
Digital-to-Analog Glitch Impulse
Output Capacitance
Digital Feedthrough
Analog THD
Digital THD
Power Supply Range, V
Supply Current, I
Power Supply Sensitivity
Measured to ±1 mV of FS
Measured to ±4 mV of FS
Measured to ±16 mV of FS
I
I
50 kHz f
20 kHz f
Output Noise Spectral Density
SFDR Performance (Wide Band)
SFDR Performance (Narrow Band)
Intermodulation Distortion
OUT
OUT
50 kHz f
20 kHz f
50 kHz f
20 kHz f
1
2
OUT
OUT
OUT
OUT
OUT
OUT
DD
DD
1
1
Min
2.5
Typ
12
100
24
16
20
10
2
13
28
18
5
0.5
83
71
77
25
78
74
87
85
79
0.4
Rev. C | Page 4 of 28
Max
72
64
44
110
40
33
40
30
5.5
10
0.6
0.001
Unit
MHz
dB
dB
dB
ns
ns
ns
ns
ns
nV-s
pF
pF
pF
pF
nV-s
dB
dB
dB
nV/√Hz
dB
dB
dB
dB
dB
V
μA
μA
%/%
Conditions
V
V
100 kHz
1 MHz
10 MHz
V
loaded with 0s and 1s
Interface delay time
Rise and fall time, V
1 LSB change around major carry, V
DAC latches loaded with all 0s
DAC latches loaded with all 1s
DAC latches loaded with all 0s
DAC latches loaded with all 1s
Feedthrough to DAC output with CS high and
alternate loading of all 0s and all 1s
V
Clock = 1 MHz, V
@ 1 kHz
Clock = 10 MHz, V
Clock = 1 MHz, V
f
T
T
∆V
1
A
A
REF
REF
REF
REF
= 20 kHz, f
= −40°C to +125°C, logic inputs = 0 V or V
= 25°C, logic inputs = 0 V or V
DD
= ±3.5 V, DAC loaded with all 1s
= ±3.5 V, DAC loaded with all 0s
= 10 V, R
= 3.5 V p-p, all 1s loaded, f = 1 kHz
= ±5%
2
LOAD
= 25 kHz, clock = 1 MHz, V
= 100 Ω, DAC latch alternately
REF
REF
REF
REF
= 3.5 V
= 3.5 V
= 3.5 V
= 10 V, R
LOAD
DD
= 100 Ω
REF
= 0 V
REF
= 3.5 V
DD