AD5328 Analog Devices, AD5328 Datasheet
AD5328
Specifications of AD5328
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AD5328 Summary of contents
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... V to 5.5 V supply, consuming 0.7 mA typical Their on-chip output amplifiers allow the outputs to swing rail-to-rail with a slew rate of 0.7 V/μs. The AD5308/ AD5318/AD5328 use a versatile 3-wire serial interface that operates at clock rates MHz and is compatible with standard SPI, QSPI, MICROWIRE, and DSP interface standards ...
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... Microwire-to-AD5308/AD5318/AD5328 Interface.............. 20 Applications Information .............................................................. 21 Typical Application Circuit....................................................... 21 Driving V from the Reference Voltage ................................ 21 DD Bipolar Operation Using the AD5308/AD5318/AD5328..... 21 Opto-Isolated Interface for Process Control Applications ... 21 Decoding Multiple AD5308/AD5318/AD5328s.................... 22 Outline Dimensions ....................................................................... 24 Ordering Guide .......................................................................... 24 ...
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... BUFFER REGISTER REGISTER DAC G RESET INPUT DAC STRING DD BUFFER BUFFER REGISTER REGISTER DAC H POWER-ON GAIN-SELECT RESET LOGIC EFGH REF Figure 1. Rev Page AD5308/AD5318/AD5328 GAIN-SELECT LOGIC V A OUT V B OUT V C OUT V D OUT V E OUT V F OUT V G OUT V ...
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... Table 1. 2 Parameter Min DC PERFORMANCE 3, 4 AD5308 Resolution 8 Relative Accuracy Differential Nonlinearity AD5318 Resolution 10 Relative Accuracy Differential Nonlinearity AD5328 Resolution 12 Relative Accuracy Differential Nonlinearity Offset Error Gain Error Lower Deadband 5 5 Upper Deadband Offset Error Drift 6 6 Gain Error Drift 6 DC Power Supply Rejection Ratio ...
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... See the Terminology section specifications tested with the outputs unloaded unless stated otherwise. 4 Linearity is tested using a reduced code range: AD5308 (Code 8 to Code 255), AD5318 (Code 28 to Code 1023), and AD5328 (Code 115 to Code 4095). 5 This corresponds to x codes deadband voltage/LSB size. 6 Guaranteed by design and characterization ...
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... AD5308/AD5318/AD5328 Table 3. Timing Characteristics A, B Version Parameter Limit MIN MAX 4 Guaranteed by design and characterization; not production tested. 2 All input signals are specified with t ...
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... Exposure to absolute maximum rating conditions for extended periods may affect + 0 device reliability ESD CAUTION − T )/θ Rev Page AD5308/AD5318/AD5328 ...
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... MHz. The SCLK input buffer is powered down after each write cycle. LDAC 1 16 SCLK SYNC 2 15 DIN AD5308 GND DD AD5318 OUT OUT AD5328 OUT OUT TOP VIEW OUT OUT (Not to Scale ...
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... CODE Figure 5. AD5318 Typical INL Plot 25° –4 –8 –12 0 500 1000 1500 2000 2500 CODE Figure 6. AD5328 Typical INL Plot 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 200 250 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 800 1000 1.0 0.5 0 –0.5 –1.0 3000 ...
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... AD5308/AD5318/AD5328 0. ° MAX INL 0.25 0 MIN DNL –0.25 MIN INL –0. (V) REF Figure 10. AD5308 INL and DNL Error vs REF 0 MAX INL 0.3 0.2 MAX DNL 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 – TEMPERATURE (°C) Figure 11. AD5308 INL Error and DNL Error vs. Temperature 1 ...
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... Decreasing CH1 CH2 4.0 4.5 5.0 CH1 CH2 4.5 5.0 5 25° CH1 CH2 3.5 4.0 4.5 5.0 Rev Page AD5308/AD5318/AD5328 T = 25° REF V A OUT SCLK CH1 1V, CH2 5V, TIME BASE = 1μs/DIV Figure 19. Half-Scale Settling (1/4 to 3/4 Scale Code Change 25° ...
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... I (mA) DD Figure 22. I Histogram with and 2.50 2.49 2.48 2.47 1μs/DIV Figure 23. AD5328 Major-Code Transition Glitch Energy 10 0 –10 –20 –30 –40 –50 –60 10 100 1k 10k FREQUENCY (Hz) Figure 24. Multiplying Bandwidth (Small-Signal Frequency Response) 1.0 1 100k 1M 10M Rev Page ...
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... This is the difference between an ideal sine wave and its atten- uated version using the DAC. The sine wave is used as the refer- ence for the DAC and the THD is a measure of the harmonics present on the DAC output measured in decibels. Rev Page AD5308/AD5318/AD5328 ...
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... AD5308/AD5318/AD5328 OUTPUT VOLTAGE NEGATIVE OFFSET DAC CODE ERROR LOWER DEADBAND CODES AMPLIFIER FOOTROOM NEGATIVE OFFSET ERROR Figure 27. Transfer Function with Negative Offset (V GAIN ERROR PLUS OFFSET ERROR OUTPUT VOLTAGE POSITIVE OFFSET ACTUAL ERROR IDEAL = V ) REF DD Rev Page GAIN ERROR PLUS ...
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... REF V OUT N 2 where the decimal equivalent of the binary code that is loaded to the DAC register 255 for AD5308 (8 bits 1023 for AD5318 (10 bits 4095 for AD5328 (12 bits the DAC resolution. V ABCD REF V DD REFERENCE BUFFER V BUF ...
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... DAC A, DAC B, DAC C, DAC D, DAC E, DAC F, DAC G, or DAC H. The AD5328 uses all 12 bits of DAC data. The AD5318 uses 10 bits and ignores the 2 LSBs. The AD5308 uses 8 bits and ignores the last 4 bits. These ignored LSBs should be set to 0. The data format is straight binary, with all 0s corresponding output and all 1s corresponding to full-scale output ...
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... D11 D10 DATA BITS Figure 34. AD5328 Input Shift Register Contents V DD These bits are set when used as a reference. The DD first group of DACs ( and D) can be set up to use V setting Bit 0, and the second group of DACs ( and H) by setting Bit 1 ...
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... LDAC was low. Normally, when LDAC is brought low, the DAC registers are filled with the contents of the input regis- ters. In the case of the AD5308/AD5318/AD5328, the part updates the DAC register only if the input register has been changed since the last time the DAC register was updated, thereby removing unnecessary digital crosstalk ...
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... Data is transmitted MSB first. To load data to the AD5308/AD5318/AD5328, PC7 is left low after the first eight bits are transferred, and a second serial write operation is performed to the DAC. PC7 is taken high at the end of this procedure ...
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... INTERFACE Figure 39 shows an interface between the AD5308/AD5318/ AD5328 and any MICROWIRE-compatible device. Serial data is shifted out on the falling edge of the serial clock, SK, and is clocked into the AD5308/AD5318/AD5328 on the rising edge of SK, which corresponds to the falling edge of the DAC’s SCLK. MICROWIRE* CS ...
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... DD AD589/AD1580 WITH DIN V = 2.5V SYNC DD SERIAL INTERFACE Figure 40. AD5308/AD5318/AD5328 Using a 2 External Reference DRIVING V FROM THE REFERENCE VOLTAGE output range required when the reference DD inputs are configured as unbuffered, the simplest solution is to connect the reference input this supply can be noisy ...
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... DIN Figure 42. AD5308/AD5318/AD5328 in an Opto-Isolated Interface DECODING MULTIPLE AD5308/AD5318/AD5328s The SYNC pin on the AD5308/AD5318/AD5328 can be used in applications to decode a number of DACs. In this application, the DACs in the system receive the same serial clock and serial data but only the SYNC to one of the devices is active at any one time, allowing access to four channels in this 16-channel sys- tem ...
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... Additional Pin Functions BUF 6 ✓ ✓ 8 ✓ ✓ 8 ✓ Rev Page AD5308/AD5318/AD5328 Interface Package Pins SPI SOT-23, MSOP 6, 8 SPI SOT-23, MSOP 6, 8 SPI SOT-23, MSOP 6, 8 2-Wire SOT-23, MSOP 6, 8 2-Wire SOT-23, MSOP 6, 8 2-Wire ...
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... AD5328ARUZ −40°C to +125°C AD5328ARUZ-REEL7 −40°C to +125°C AD5328BRU −40°C to +125°C AD5328BRU-REEL −40°C to +125°C AD5328BRU-REEL7 −40°C to +125°C AD5328BRUZ −40°C to +125°C AD5328BRUZ-REEL −40°C to +125°C AD5328BRUZ-REEL7 −40°C to +125°C AD5308WARUZ-REEL7 − ...
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... Specifications section of this data sheet carefully. Only the automotive grade product shown is available for use in automotive applications. Contact your local Analog Devices, Inc., account representative for specific product ordering information and to obtain the specific Automotive Reliability report for this model. AD5308/AD5318/AD5328 Rev Page ...
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... AD5308/AD5318/AD5328 NOTES Rev Page ...
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... NOTES AD5308/AD5318/AD5328 Rev Page ...
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... AD5308/AD5318/AD5328 NOTES ©2002–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02812-0-4/11(F) Rev Page ...