AD5317 Analog Devices, AD5317 Datasheet - Page 4
AD5317
Manufacturer Part Number
AD5317
Description
Manufacturer
Analog Devices
Datasheet
1.AD5307.pdf
(28 pages)
Specifications of AD5317
Resolution (bits)
10bit
Dac Update Rate
143kSPS
Dac Settling Time
7µs
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Voltage Out
Dac Input Format
Ser,SPI
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AD5307/AD5317/AD5327
Parameter
LOGIC INPUTS
LOGIC OUTPUT (SDO)
POWER REQUIREMENTS
1
2
3
4
5
6
7
8
Temperature range (A, B versions): −40°C to +105°C; typical at +25°C.
See the Terminology section.
DC specifications tested with the outputs unloaded, unless otherwise noted.
Linearity is tested using a reduced code range: AD5307 (Code 8 to Code 255); AD5317 (Code 28 to Code 1023); AD5327 (Code 115 to Code 4095).
This corresponds to x codes, where x = deadband voltage/LSB size.
Guaranteed by design and characterization; not production tested.
For the amplifier output to reach its minimum voltage, offset error must be negative. For the amplifier output to reach its maximum voltage, V
gain error must be positive.
Interface inactive. All DACs active. DAC outputs unloaded.
Input Current
Input Low Voltage, V
Input High Voltage, V
Input High Voltage, V
Pin Capacitance
V
Output Low Voltage, V
Output High Voltage, V
Output Low Voltage, V
Output High Voltage, V
Floating State Leakage Current
Floating State Output Capacitance
V
I
I
DD
DD
DD
DD
(Excluding DCEN)
(DCEN)
V
V
V
V
V
(Normal Mode)
(Power-Down Mode)
= 4.5 V to 5.5 V
DD
DD
DD
DD
DD
= 2.5 V to 3.6 V
= 4.5 V to 5.5 V
= 2.5 V to 3.6 V
= 4.5 V to 5.5 V
= 2.5 V to 3.6 V
2
8
IL
IH
IH
OL
OL
OH
OH
Min
1.7
2.4
2.1
2.0
V
V
0.5
2.5
DD
DD
− 1
−
A Version
Typ
3
0.4
0.4
3
500
400
0.3
0.09
1
Max
±1
0.8
0.6
0.5
±1
5.5
900
750
1
1
Rev. C | Page 4 of 28
Min
1.7
2.4
2.1
2.0
V
0.4
V
0.5
2.5
DD
DD
− 1
−
B Version
Typ
3
3
500
400
0.3
0.09
Max
±1
0.8
0.6
0.5
0.4
±1
5.5
900
750
1
1
Unit
mA
V
V
V
V
V
V
pF
V
V
V
V
μA
pF
V
μA
μA
μA
μA
Conditions/Comments
V
V
V
V
1.8 V CMOS compatible
V
V
V
I
I
I
I
DCEN = GND
DCEN = GND
V
All DACs in unbuffered mode; in
buffered mode, extra current is
typically x mA per DAC, where
x = 5 mA + V
V
SINK
SOURCE
SINK
SOURCE
DD
DD
DD
DD
DD
DD
DD
IH
IH
= V
= V
= 5 V ± 10%
= 3 V ± 10%
= 2.5 V
= 2.5 V to 5.5 V; TTL and
= 5 V ± 10%
= 3 V ± 10%
= 2.5 V
= 2 mA
= 2 mA
= 2 mA
= 2 mA
DD
DD
and V
and V
REF
REF
IL
IL
/R
= V
= GND
= GND
DAC
DD
and offset plus