AD5305 Analog Devices, AD5305 Datasheet
AD5305
Specifications of AD5305
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AD5305 Summary of contents
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... FEATURES AD5305: 4 buffered 8-bit DACs in 10-lead MSOP A version: ±1 LSB INL, B version: ±0.625 LSB INL AD5315: 4 buffered 10-bit DACs in 10-lead MSOP A version: ±4 LSB INL, B version: ±2.5 LSB INL AD5325: 4 buffered 12-bit DACs in 10-lead MSOP A version: ±16 LSB INL, B version: ±10 LSB INL Low power operation: 500 μ ...
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... Read Operation........................................................................... 17 Double-Buffered Interface ........................................................ 18 Power-Down Modes .................................................................. 18 Applications..................................................................................... 20 Typical Application Circuit....................................................... 20 Bipolar Operation....................................................................... 20 Multiple Devices on One Bus ................................................... 20 AD5305/AD5315/AD5325 as a Digitally Programmable Window Detector ....................................................................... 21 Coarse and Fine Adjustment Using the AD5305/AD5315/AD5325 ....................................................... 21 Power Supply Decoupling ......................................................... 21 Outline Dimensions ....................................................................... 23 Ordering Guide .......................................................................... 23 Added Octals Section to Table II.................................................. 18 Updated Outline Dimensions....................................................... 19 4/01— ...
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... V − V − 0.001 0.001 0.5 0 2.5 2 Rev Page AD5305/AD5315/AD5325 unless otherwise noted. MIN MAX Unit Conditions/Comments Bits LSB LSB Guaranteed monotonic by design over all codes Bits LSB LSB Guaranteed monotonic by design over all codes Bits LSB LSB ...
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... See the Terminology section specifications tested with the outputs unloaded. 4 Linearity is tested using a reduced code range: AD5305 (Code 8 to 248); AD5315 (Code 28 to 995); AD5325 (Code 115 to 3981). 5 Guaranteed by design and characterization, not production tested. 6 For the amplifier output to reach its minimum voltage, offset error must be negative; to reach its maximum voltage, V positive ...
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... Capacitive load for each bus line min of the SCL signal) in order to bridge the undefined region of SCL’s IH and t measured between 0.3 V and 0 Rev Page AD5305/AD5315/AD5325 unless otherwise noted. MIN MAX Conditions/Comments REF DD ¼ scale to ¾ scale change (0×40 to 0×C0) ¼ ...
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... AD5305/AD5315/AD5325 SDA SCL t 4 START CONDITION Figure 2. 2-Wire Serial Interface Timing Diagram Rev Page REPEATED STOP START CONDITION CONDITION t 8 ...
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... V other conditions above those indicated in the operational DD + 0.3 V section of this specification is not implied. Exposure to absolute DD + 0.3 V maximum rating conditions for extended periods may affect DD + 0.3 V device reliability. DD )/θ Rev Page AD5305/AD5315/AD5325 ...
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... Serial Clock Line. This is used in conjunction with the SDA line to clock data into or out of the 16-bit input shift register. Clock rates 400 kb/s can be accommodated in the 2-wire interface Address Input. Sets the least significant bit of the 7-bit slave address AD5305 SCL 2 9 OUT AD5315/ AD5325 V ...
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... TYPICAL PERFORMANCE CHARACTERISTICS 1 25° 0.5 0 –0.5 –1 100 150 CODE Figure 4. AD5305 Typical INL Plot 25° –1 –2 –3 0 200 400 600 CODE Figure 5. AD5315 Typical INL Plot 25° –4 – ...
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... Figure 11. AD5305 INL and DNL Error vs. Temperature 1 REF OFFSET ERROR 0.5 0 GAIN ERROR –0.5 –1.0 – TEMPERATURE (°C) Figure 12. AD5305 Offset Error and Gain Error vs. Temperature 0.2 0.1 MAXDNL –0.1 –0.2 –0.3 –0.4 –0.5 –0 REF 80 120 600 500 400 ...
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... Figure 19. Half-Scale Settling (1/4 to 3/4 Scale Code Change) CH1 CH2 CH1 2V, CH2 200mV, TIME BASE = 200µs/DIV 5.0 5.5 DECREASING INCREASING CH1 CH2 CH1 500mV, CH2 5V, TIME BASE = 1µs/DIV 4 5 Rev Page AD5305/AD5315/AD5325 T = 25° REF V A OUT SCL T = 25° ...
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... AD5305/AD5315/AD5325 300 350 400 450 500 I (µA) DD Figure 22. I Histogram with and 2.50 2.49 2.48 2.47 1µs/DIV Figure 23. AD5325 Major-Code Transition Glitch Energy 10 0 –10 –20 –30 –40 –50 –60 10 100 1k 10k FREQUENCY (Hz) Figure 24. Multiplying Bandwidth (Small-Signal Frequency Response ...
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... This is the difference between an ideal sine wave and its attenuated version using the DAC. The sine wave is used as the reference for the DAC and the THD is a measure of the harmonics present on the DAC output measured in dB. Rev Page AD5305/AD5315/AD5325 ...
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... AD5305/AD5315/AD5325 OUTPUT IDEAL VOLTAGE ACTUAL NEGATIVE OFFSET DAC CODE ERROR DEAD BAND CODES AMPLIFIER FOOTROOM (1mV) NEGATIVE OFFSET ERROR Figure 27. Transfer Function with Negative Offset GAIN ERROR PLUS OFFSET ERROR OUTPUT VOLTAGE POSITIVE OFFSET Rev Page GAIN ERROR PLUS OFFSET ERROR ...
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... The slew rate is 0.7 V/μs with a half-scale settling time to ±0.5 LSB (at eight bits μs. POWER-ON RESET V A OUT The AD5305/AD5315/AD5325 are provided with a power-on reset function, so that they power defined state. The OUTPUT BUFFER AMPLIFIER power-on state is • Normal operation • ...
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... AD5305/AD5315/AD5325 SERIAL INTERFACE The AD5305/AD5315/AD5325 are controlled via an I compatible serial bus. The DACs are connected to this bus as slave devices (that is, no clock is generated by the AD5305/ AD5315/AD5325 DACs). This interface is SMBus compatible at V < 3 The AD5305/AD5315/AD5325 have a 7-bit slave address. The 6 MSB are 000110 and the LSB is determined by the state of the A0 pin ...
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... MSB MOST SIGNIFICANT DATA BYTE WRITE OPERATION When writing to the AD5305/AD5315/AD5325 DACs, the user must begin with an address byte ( 0), after which the DAC acknowledges that it is prepared to receive data by pulling SDA low. This address byte is followed by the pointer byte, which is also acknowledged by the DAC ...
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... LDAC was brought low. Normally, when LDAC is brought low, the DAC registers are filled with the contents of the input registers. In the case of the AD5305/AD5315/ AD5325, the part updates the DAC register only if the input register has been changed since the last time the DAC register was updated, thereby removing unnecessary digital crosstalk ...
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... DAC amplifier. There are three different options. The output is connected internally to GND through a 1 kΩ resistor, a 100 kΩ resistor left open-circuited (three-state). Resistor tolerance = ±20%. The output stage is illustrated in Figure 35. AD5305/AD5315/AD5325 RESISTOR AMPLIFIER STRING DAC POWER-DOWN CIRCUITRY Figure 35 ...
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... REFIN = kΩ, V MULTIPLE DEVICES ON ONE BUS Figure 38 shows two AD5305 devices on the same serial bus. Each has a different slave address because the state of the A0 pin is different. This allows each of eight DACs to be written to or read from independently. ...
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... AD5305/AD5315/AD5325 system where multiple devices require an AGND-to-DGND connection, the connection signal. IN should be made at one point only. The star ground point should be established as close as possible to the device. The AD5305/ 1kΩ 1kΩ AD5315/AD5325 should have ample supply bypassing of 10 μF PASS FAIL in parallel with 0.1 μ ...
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... DUALS AD5302 8 2 AD5312 10 2 AD5322 12 2 AD5303 8 2 AD5313 10 2 AD5323 12 2 QUADS AD5304 8 4 AD5314 10 4 AD5324 12 4 AD5305 8 4 AD5315 10 4 AD5325 12 4 AD5306 8 4 AD5316 10 4 AD5326 12 4 AD5307 8 4 AD5317 10 4 AD5327 12 4 OCTALS AD5308 8 8 ...
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... AD5305ARMZ −40°C to +105°C 1 AD5305ARMZ-REEL7 −40°C to +105°C AD5305BRM −40°C to +105°C AD5305BRM-REEL −40°C to +105°C AD5305BRM-REEL7 −40°C to +105°C 1 AD5305BRMZ −40°C to +105°C AD5305BRMZ-REEL7 1 −40°C to +105°C AD5315ARM −40°C to +105°C AD5315ARM-REEL7 − ...
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... AD5305/AD5315/AD5325 NOTES Purchase of licensed components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I 2 Rights to use these components system, provided that the system conforms to the I ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...