AD5343 Analog Devices, AD5343 Datasheet
AD5343
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AD5343 Summary of contents
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... FEATURES AD5332: Dual 8-Bit DAC in 20-Lead TSSOP AD5333: Dual 10-Bit DAC in 24-Lead TSSOP AD5342: Dual 12-Bit DAC in 28-Lead TSSOP AD5343: Dual 12-Bit DAC in 20-Lead TSSOP Low Power Operation: 230 300 via PD Pin Power-Down 200 2 5.5 V Power Supply ...
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... See Terminology section. 2 Temperature range: B Version: –40°C to +105°C; typical specifications are at 25°C. 3 Linearity is tested using a reduced code range: AD5332 (Code 8 to 255); AD5333 (Code 28 to 1023); AD5342/AD5343 (Code 115 to 4095 specifications tested with outputs unloaded. 5 This corresponds to x codes ...
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... CLR A0 1 SYNCHRONOUS LDAC UPDATE MODE 2 ASYNCHRONOUS LDAC UPDATE MODE Figure 1. Parallel Interface Timing Diagram –3– AD5332/AD5333/AD5342/AD5343 to T MIN Conditions/Comments See Figure 20 REF 1/4 Scale to 3/4 Scale Change ( 1/4 Scale to 3/4 Scale Change (100 H to 300 H) 1/4 Scale to 3/4 Scale Change (400 H to C00 H) ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD5332/AD5333/AD5342/AD5343 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. θ ...
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... V Power Supply Pin. These parts can operate from 2 5.5 V and the supply should be decoupled with capacitor in parallel with a 0.1 F capacitor to GND. 13–20 DB –DB Eight Parallel Data Inputs REV. 0 AD5332/AD5333/AD5342/AD5343 REF DD AD5332 8-BIT V BUFFER OUT DAC 8-BIT ...
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... AD5332/AD5333/AD5342/AD5343 AD5333 FUNCTIONAL BLOCK DIAGRAM POWER-ON DAC RESET REGISTER BUF GAIN INPUT REGISTER INTER- FACE LOGIC CS INPUT REGISTER WR DAC A0 REGISTER RESET CLR LDAC Pin No. Mnemonic Function 1 GAIN Gain Control Pin. This controls whether the output range from the DAC is 0–V ...
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... Power-Down Pin. This active low control pin puts all DACs into power-down mode Power Supply Pin. These parts can operate from 2 5.5 V and the supply should be decoupled with capacitor in parallel with a 0.1 F capacitor to GND. 17–28 DB –DB 12 Parallel Data Inputs REV. 0 AD5332/AD5333/AD5342/AD5343 REF DD AD5342 12-BIT BUFFER V A OUT DAC ...
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... Eight Parallel Data Inputs REF AD5343 DAC 12-BIT BUFFER REGISTER DAC DAC 12-BIT BUFFER REGISTER DAC POWER-DOWN AD5343 PIN FUNCTION DESCRIPTIONS is the MSB of these eight bits. 7 –8– AD5343 PIN CONFIGURATION V DD HBEN REF OUT ...
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... DAC transfer characteristic from the ideal expressed as a percentage of the full-scale range. This is illus- trated in Figure 2. ACTUAL OUTPUT VOLTAGE IDEAL DAC CODE Figure 2. Gain Error REV. 0 AD5332/AD5333/AD5342/AD5343 OUTPUT VOLTAGE POSITIVE OFFSET Figure 3. Positive Offset Error and Gain Error OUTPUT VOLTAGE NEGATIVE OFFSET ...
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... AD5332/AD5333/AD5342/AD5343 OFFSET ERROR DRIFT This is a measure of the change in Offset Error with changes in temperature expressed in (ppm of full-scale range)/°C. GAIN ERROR DRIFT This is a measure of the change in Gain Error with changes in tem- perature expressed in (ppm of full-scale range)/°C. POWER-SUPPLY REJECTION RATIO (PSRR) This indicates how the output of the DAC is affected by changes in the supply voltage ...
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... MAX INL MAX DNL 0.00 MIN DNL –0.25 MIN INL –0.50 –0.75 –1. – V REF Figure 11. AD5332 INL and DNL Error vs. V REF REV. 0 AD5332/AD5333/AD5342/AD5343 –1 –2 –3 0 200 400 600 800 1000 CODE Figure 6. AD5333 Typical INL Plot ...
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... AD5332/AD5333/AD5342/AD5343 0 0 REF 0 GAIN ERROR –0.1 –0.2 –0.3 –0.4 OFFSET ERROR –0.5 –0 – Volts DD Figure 14. Offset Error and Gain Error vs 400 300 200 100 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 V – Figure 17. Supply Current vs. Supply ...
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... Their output voltage range may be configured The reference inputs of the AD5332 and AD5343 REF are unbuffered and their output range have a power-down feature that reduces current consumption to only ...
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... See Figure 20. PARALLEL INTERFACE The AD5332, AD5333, and AD5342 load their data as a single 8-, 10-, or 12-bit word, while the AD5343 loads data as a low byte of 8 bits and a high byte containing 4 bits. Double-Buffered Interface ...
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... High-Byte Enable Input (HBEN) High-Byte Enable is a control input on the AD5343 only that determines if data is written to the high-byte input register or the low-byte input register. The low data byte of the AD5343 consists of data bits data inputs while the high byte consists of data ...
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... Figure 32. GAIN and BUF Data on a 16-Bit Bus APPLICATIONS INFORMATION Typical Application Circuits The AD5332/AD5333/AD5342/AD5343 can be used with a wide range of reference voltages, especially if the reference inputs are configured to be unbuffered, in which case the devices offer full, one-quadrant multiplying capability over a reference range of 0 ...
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... WR pulses, but only the CS to one of the DACs will be active at any one time, so data will only be written to the DAC whose CS is low. If multiple AD5343s are being used, a common HBEN line will also be required to determine if the data is written to the high-byte or low-byte register of the selected DAC ...
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... The circuit is shown with a 2.5 V reference, but reference volt- ages may be used. The op amps indicated will allow a DD rail-to-rail output swing. Note that the AD5343 has only a single reference input. If using the AD5332, AD5333, or AD5342, both reference inputs must be connected ...
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... AD5306 8 4 AD5316 10 4 AD5326 12 4 AD5307 8 4 AD5317 10 4 AD5327 12 4 Visit our web-page at http://www.analog.com/support/standard_linear/selection_guides/AD53xx.html REV. 0 AD5332/AD5333/AD5342/AD5343 Table III. Overview of AD53xx Parallel Devices Pins Settling Time Additional Pin Functions REF BUF 6 µ µs 8 µ µ µs 7 µ µ µs 6 µ ...
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... AD5332/AD5333/AD5342/AD5343 PIN 1 0.006 (0.15) 0.002 (0.05) SEATING PIN 1 0.006 (0.15) 0.002 (0.05) SEATING PIN 1 0.006 (0.15) 0.002 (0.05) SEATING PLANE OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 20-Lead Thin Shrink Small Outline Package TSSOP (RU-20) 0.260 (6.60) 0.252 (6.40 0.177 (4.50) 0.169 (4.30) 0.256 (6.50) 0.246 (6.25 0.0433 (1.10) MAX 8 0.0256 (0.65) 0 0.0118 (0.30) 0.0079 (0.20) BSC ...