AD9774 Analog Devices, AD9774 Datasheet
AD9774
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AD9774 Summary of contents
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... The full-scale current of the AD9774 can be adjusted over range, thus providing additional gain ranging capabilities. The AD9774 is available in a 44-lead MQFP package specified for operation over the industrial temperature range. PRODUCT HIGHLIGHTS 1. On-Chip 4 interpolation filter eases analog reconstruction filter requirements by suppressing the first three images ...
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... AD9774–SPECIFICATIONS DC SPECIFICATIONS ( MIN Parameter RESOLUTION 1 DC ACCURACY Integral Linearity Error (INL + MIN MAX Differential Nonlinearity (DNL + MIN MAX Monotonicity (12-Bit) ANALOG OUTPUT Offset Error Gain Error (Without Internal Reference) Gain Error (With Internal Reference) ...
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... Typ Max 128 2.5 2 – unless otherwise noted) OUTFS Typ Max 1.3 0 0.9 +10 +10 5 2.5 1.5 4 0.025% AD9774 Units MSPS MSPS ns 1 Clocks pV pA Units ...
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... Exposure to absolute maximum ratings for extended periods may effect device reliability AVDD = +2 +5.5 V, DVDD = +2 +5 MIN MAX otherwise noted) Min ) CLOCK 32 25 Model Max Units AD9774AS AD9774EB +6 Metric Quad Flatpack. +6.5 V +0.3 V THERMAL CHARACTERISTIC +0.3 V Thermal Resistance +0.3 V 44-Lead MQFP +6 ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9774 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION DCOM 1 PIN 1 IDENTIFIER 2 DB13 DB12 3 DB11 4 DB10 5 AD9774 6 DB9 TOP VIEW (Not to Scale) DB8 7 8 DB7 DB6 9 DB5 10 11 DB4 CONNECT –6– 33 REFCOMP 32 FSADJ ...
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... PLLVDD 4 IOUTA 14-BIT DAC 2 2 IOUTB REFIO +1.2V REFERENCE AD9774 AND CONTROL AMP FSADJ REFCOMP REFLO 0.1 F 0.1 F +3V + Figure 3. Basic AC Characterization Test Setup –7– TO HP3589A SPECTRUM / NETWORK LPF ANALYZER 50 INPUT 1.5k 0.01 F MINI-CIRCUITS +3V D T1-1T 100 0 20pF 20pF 1.91k AD9774 ...
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... AD9774 Typical AC Characterization Curves (AVDD = +5 V, PLLVDD = +3 V, DVDD = + noted. Note: PLLVDD = +5 V and DVDD = +5 V for Figures 4, 5 and 6.) “INBAND” –10 –20 –30 –40 –50 –60 –70 –80 –90 0 25.6 51.2 76.8 102.4 128.0 MHz Figure 4. Single Tone Spectral Plot @ 32 MSPS w ...
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... A – dBFS OUT Figure 20. “Out-of-Band” Two Tone SFDR vs OUT OUT CLOCK ( 1/2 CLKIN) –9– AD9774 85 80 0dBFS 75 70 –6dBFS 65 –12dBFS 60 –18dBFS 0.2 0.3 0.4 0.5 0.7 0.8 f – ...
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... AD9774 FUNCTIONAL DESCRIPTION Figure 22 shows a simplified block diagram of the AD9774. The AD9774 is a complete, 4 oversampling, 14-bit DAC that in- cludes two cascaded 2 interpolation filters, a phase-locked loop (PLL) clock multiplier, and a 1.20 Volt bandgap voltage refer- ence. The 14-bit DAC provides two complementary current outputs whose full-scale current is determined by an external resistor ...
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... PLL CLOCK MULTIPLIER OPERATION The Phase Lock Loop (PLL) Clock Multiplier is intrinsic to the operation of the AD9774 in that it produces the necessary inter- nally synchronized and 4 clocks for the edge triggered latches, interpolation filters and DACs. Figure 24 shows a func- tional block diagram of the PLL Clock Multiplier, which con- ...
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... R ship as shown in Equation 8. , which is mirrored over REFERENCE OPERATION The AD9774 contains an internal 1.20 V bandgap reference that can be easily disabled and overridden by an external reference. REFIO serves as either an input or output, depending on whether the internal or external reference is selected. If REFLO is tied to ACOM, as shown in Figure 27, the internal reference is activated, and REFIO provides a 1 ...
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... I OUTFS 62.5 A and 625 A. The wide adjustment span of I provides several application benefits. The first benefit relates directly to the power dissipation of the AD9774, which is pro- portional to I (refer to the Power Dissipation section). The OUTFS second benefit relates to the 20 dB adjustment, which is useful for system gain control purposes ...
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... The negative output compliance range of –1 set by the breakdown limits of the CMOS process. Operation beyond this maximum limit may result in a break- down of the output stage and affect the reliability of the AD9774. The positive output compliance range is slightly dependent on the full-scale output current, I ...
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... V to 5.5 V and temperature range. This mode can be activated by applying a logic level “1” to the SLEEP pin. The AD9774 takes less than 0 power down and approximately 6 power back up. The SNOOZE mode should be considered as an alternative power-savings option if the power-up characteristics of the SLEEP mode are unsuitable ...
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... The differential circuit shown in Figure 38 provides the neces- sary level-shifting required in a single supply system. In this case, AVDD, which is the positive analog supply for both the AD9774 and the op amp, is also used to level-shift the differential output of the AD9774 to midsupply (i.e., AVDD/2). The AD8041 is a suitable op amp for this application ...
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... SINGLE-ENDED BUFFERED VOLTAGE OUTPUT CONFIGURATION Figure 40 shows a buffered single-ended output configuration in which the op amp U1 performs an I-V conversion on the AD9774 output current. U1 maintains IOUTA (or IOUTB virtual ground, thus minimizing the nonlinear output impedance effect on the DAC’s INL performance as discussed in the Analog Output section ...
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... DAC (i.e., AD9774) tend to dominate thus contributing to the roll-off in its SFDR performance. However, unlike most DACs, which employ an R-2R ladder for the lower bit current segmentation, the AD9774 (as well as other TxDAC members) exhibits an improvement in distortion performance as the amplitude of a single tone is reduced from its full-scale level. ...
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... AD9774 in signal reconstruction applica- tions, where high resolution, high speed conversion is required. This board allows the user the flexibility to operate the AD9774 in various configurations. The digital inputs are designed to be driven directly from various word generators with the onboard option to add a resistor network for proper load termination ...
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... U8 U6 DGND AVDD C3 TP15 TP17 0.1 F C12 0 DCOM AD9774 TOP VIEW DB9 6 (Not to Scale) DB8 7 DB7 8 DB6 9 DB5 10 DB4 C11 0.1 F DVDD DGND J1 J8 EXT CLK TP13 ...
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... REV. B Figure 45. Silkscreen Layer—Top Figure 46. Component Side PCB Layout (Layer 1) –21– AD9774 ...
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... AD9774 Figure 47. Ground Plane PCB Layout (Layer 2) Figure 48. Power Plane PCB Layout (Layer 3) –22– REV. B ...
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... REV. B Figure 49. Solder Side PCB Layout (Layer 4) Figure 50. Silkscreen Layer—Bottom –23– AD9774 ...
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... AD9774 1.03 (0.041) 0.73 (0.029) 0.25 (0.01) 0.23 (0.009) 0.13 (0.005) OUTLINE DIMENSIONS Dimensions shown in millimeters and (inches). 44-Lead Metric Quad Flatpack (S-44) 13.45 (0.529) 12.95 (0.510) 2.45 (0.096) 10.10 (0.398) MAX 9.90 (0.390 MIN 1 SEATING PLANE TOP VIEW (PINS DOWN MIN 0.80 (0.031) 0.45 (0.018) BSC 2.10 (0.083) 0.30 (0.012) 1.95 (0.077) –24– ...