AD9762 Analog Devices, AD9762 Datasheet - Page 12

• Manufacturer Part Number: AD9762
• Manufacturer: Analog Devices

Specifications of AD9762

• Resolution (bits): 12bit
• Dac Update Rate: 125MSPS
• Dac Settling Time: 35ns
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Par

AD9762
REFERENCE OPERATION
The AD9762 contains an internal 1.20 V bandgap reference
that can be easily disabled and overridden by an external refer-
ence. REFIO serves as either an input or output depending on
whether the internal or an external reference is selected. If
REFLO is tied to ACOM, as shown in Figure 40, the internal
reference is activated and REFIO provides a 1.20 V output. In
this case, the internal reference must be compensated externally
with a ceramic chip capacitor of 0.1 µF or greater from REFIO
to REFLO. Also, REFIO should be buffered with an external
amplifier having an input bias current less than 100 nA if any
additional loading is required.
The internal reference can be disabled by connecting REFLO to
AVDD. In this case, an external reference may then be applied
to REFIO as shown in Figure 41. The external reference may
provide either a fixed reference voltage to enhance accuracy and
drift performance or a varying reference voltage for gain control.
Note that the 0.1 µF compensation capacitor is not required
since the internal reference is disabled, and the high input
impedance (i.e., 1 MΩ) of REFIO minimizes any loading of the
external reference.
REFERENCE CONTROL AMPLIFIER
The AD9762 also contains an internal control amplifier that is
used to regulate the DAC’s full-scale output current, I
The control amplifier is configured as a V-I converter as shown
in Figure 41, such that its current output, I
the ratio of the V
in Equation 4. I
sources with the proper scaling factor to set I
Equation 3.
ADDITIONAL
EXTERNAL
AVDD
REF
LOAD
Figure 41. External Reference Configuration
Figure 40. Internal Reference Configuration
R
REF BUFFER
SET
EXTERNAL
OPTIONAL
REF
REFIO
V
I
V
REFIO
REF
REFIO
is copied over to the segmented current
0.1 F
=
2k
and an external resistor, R
/R
SET
REFIO
FS ADJ
REFIO
FS ADJ
+1.2V REF
AD9762
+1.2V REF
AD9762
REFLO
REFLO
REF
50pF
50pF
OUTFS
, is determined by
REFERENCE
CONTROL
AMPLIFIER
COMP1
SET
COMP1
0.1 F
0.1 F
as stated in
CURRENT
SOURCE
, as stated
ARRAY
CURRENT
AVDD
SOURCE
ARRAY
OUTFS
+5V
AVDD
AVDD
.
–12–
The control amplifier allows a wide (10:1) adjustment span of
I
62.5 µA and 625 µA. The wide adjustment span of I
provides several application benefits. The first benefit relates
directly to the power dissipation of the AD9762, which is
proportional to I
The second benefit relates to the 20 dB adjustment, which is
useful for system gain control purposes.
The small signal bandwidth of the reference control amplifier is
approximately 1.4 MHz and can be reduced by connecting an
external capacitor between COMP1 and AVDD. The output of
the control amplifier, COMP1, is internally compensated via a
50 pF capacitor that limits the control amplifier small-signal
bandwidth and reduces its output impedance. Any additional
external capacitance further limits the bandwidth and acts as a
filter to reduce the noise contribution from the reference ampli-
fier. Figure 42 shows the relationship between the external
capacitor and the small signal –3 dB bandwidth of the
reference amplifier. Since the –3 dB bandwidth corresponds
to the dominant pole, and hence the time constant, the settling
time of the control amplifier to a stepped reference input
response can be approximated.
The optimum distortion performance for any reconstructed
waveform is obtained with a 0.1 µF external capacitor installed.
Thus, if I
capacitor is recommended. Also, since the control amplifier is
optimized for low power operation, multiplying applications
requiring large signal swings should consider using an external
control amplifier to enhance the application’s overall large signal
multiplying bandwidth and/or distortion performance.
There are two methods in which I
R
which the internal reference is disabled, and the common-mode
voltage of REFIO is varied over its compliance range of 1.25 V
to 0.10 V. REFIO can be driven by a single-supply amplifier or
DAC, thus allowing I
input impedance of REFIO is approximately 1 MΩ, a simple,
low cost R-2R ladder DAC configured in the voltage mode
topology may be used to control the gain. This circuit is shown
in Figure 43 using the AD7524 and an external 1.2 V reference,
the AD1580.
Figure 42. External COMP1 Capacitor vs. –3 dB Bandwidth
OUTFS
SET
. The first method is suitable for a single-supply system in
1000
over a 2 mA to 20 mA range by setting IREF between
10
0
0.1
REF
is fixed for an application, a 0.1 µF ceramic chip
OUTFS
REF
1
(refer to the Power Dissipation section).
COMP1 CAPACITOR – nF
to be varied for a fixed R
10
REF
can be varied for a fixed
100
SET
. Since the
OUTFS
1000
REV. B