AD8803 Analog Devices, AD8803 Datasheet
AD8803
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AD8803 Summary of contents
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... This data word is decoded where the first 3 bits determine the address of the DAC register to be loaded with the last 8 bits of data. The AD8801/AD8803 consumes only 5 A from 5 V power supplies. In addition, in shutdown mode reference input current consumption is also re- duced while saving the DAC latch settings for use after return to normal operation ...
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... +85 C unless otherwise noted) A Symbol Conditions N INL DNL Guaranteed Monotonic G FSE V ZSE R OUT R REFH V Pin Available on AD8803 Only REFL R Digital Inputs = REFH H REFH C Digital Inputs All Zeros REF0 C Digital Inputs All Ones REF1 ...
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... CS GND 8 –3– AD8801/AD8803 ORDERING GUIDE Package Package Temperature Description Option – +85 C PDIP-16 N-16 – +85 C SO-16 R-16A – +85 C PDIP-16 N-16 – +85 C SO-16 R-16A AD8803 PIN DESCRIPTIONS PIN CONFIGURATIONS REFH 15 ...
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... The format of this data word is three address bits, MSB first, followed by eight data bits, MSB first. Table I provides the se- rial register data word format. The AD8801/AD8803 has the following address assignments for the ADDR decode which de- termines the location of DAC register receiving the serial regis- ...
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... REV the follow- DIGITAL INTERFACING REFL The AD8801/AD8803 contains a standard three-wire serial in- put control interface. The three inputs are clock (CLK), CS and serial data input (SDI). The positive-edge sensitive CLK input = 0 V) requires clean transitions to avoid clocking incorrect data into REFL the serial input register ...
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... AD8801/AD8803–Typical Performance Characteristics + +5V 0.75 REFH REFL 0.5 0.25 0 –0.25 –0.5 –0.75 – 128 CODE – Decimal Figure 7. INL vs. Code + +5V REFH T = –40 C, + REFL 0.5 0.25 0 –0.25 –0.5 –0.75 – 128 CODE – Decimal Figure 8 ...
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... DD 3 3.5 4 4.5 5 Figure 16. Adjacent Channel Clock Feedthrough 10k 100k +2V REF 0.005 –0.005 –0.01 Figure 18. Zero-Scale Error Accelerated by Burn-In –7– AD8801/AD8803 OUTPUT1 +5V DD 100 V = +2V REF 500kHz 10 0% TIME – 0.2µs/DIV OUTPUT1 ...
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... AD8801/AD8803 Buffering the AD8801/AD8803 Output In many cases, the nominal 5 k output impedance of the AD8801/AD8803 is sufficient to drive succeeding circuitry lower output impedance is required, an external amplifier can be added. Several examples are shown in Figure 23. One ampli- fier of an OP291 is used as a simple buffer to reduce the output resistance of DAC A ...
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... RS-232 communications interface), the AD8801/AD8803 can easily be addressed in software. Eleven data bits are required to load a value into the AD8801/ SUMMER CIRCUIT AD8803 (3 bits for the DAC address and 8 bits for the DAC WITH FINE TRIM value). If more than 11 bits are transmitted before the Chip Se- ADJUSTMENT lect input goes high, the extra (i ...
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... CLR SETB RET ; BYTESWAP: MOV SWAP_LOOP: MOV RLC MOV MOV RRC MOV DJNZ RET END Listing 1. Software for the 8051 to AD8801/AD8803 Serial Port Interface 90H 40H 41H 042H 043H 44H 100H SCON.7 SCON.6 SCON.5 SCON.1 PORT1.1,#00001110B PORT1.1 SHIFT1,DAC_ADDR BYTESWAP SBUF,SHIFT2 SCON ...
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... MSB of the second byte with a Rotate Right Carry instruction. After 8 loops, SHIFT2 contains the data in the proper format. ; This 8051 C subroutine loads an AD8801 or AD8803 DAC with an 8-bit value, ; using the 8051’s parallel port #1. ; The DAC value is stored at location DAC_VALUE ...
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... SCK. This mode matches the requirements of the AD8801/AD8803. After the registers are saved on the stack, the DAC value and address are transferred to RAM and the AD8801/AD8803’ driven low. Next, the DAC’s ad- dress byte is transferred to the SPDR register, which automati- cally initiates the SPI data transfer ...
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... AD8801/AD8803 to M68HC11 Interface Assembly Program * * M68HC11 Register definitions * PORTC EQU $1003 * DDRC EQU $1007 PORTD EQU $1008 * DDRD EQU $1009 SPCR EQU $1028 * SPSR EQU $1029 * SPDR EQU $102A * * SDI RAM variables SDI1 EQU $00 SDI2 EQU $ Main Program * ORG $C000 ...
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... STAA SDI1 * * Enter Contents of SDI2 Data Register * LDAA $0001 STAA SDI2 * LDX #SDI1 LDY #$1000 * * Reset AD8801 to one-half scale (AD8803 does not have a Reset input) * BCLR PORTC,Y $02 BSET PORTC,Y $ Get AD8801/03 ready for data input * BCLR PORTD,Y $20 * TFRLP LDAA 0,X STAA ...
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... PLANE 0.014 (0.356) (2.54) BSC 16-Pin Narrow Body SOIC Package (R-16A 0.1574 (4.00) 0.1497 (3.80) 0.2440 (6.20 0.2284 (5.80) 0.3937 (10.00) 0.3859 (9.80) 0.0688 (1.75) 0.0532 (1.35 0.0500 0.0192 (0.49) 0.0099 (0.25) (1.27) 0.0138 (0.35) 0.0075 (0.19) BSC –15– AD8801/AD8803 0.195 (4.95) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204) 0.0196 (0.50 0.0099 (0.25) 0.0500 (1.27) 0.0160 (0.41) ...
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