AD7228 Analog Devices, AD7228 Datasheet - Page 2

• Manufacturer Part Number: AD7228
• Description: Octal, 8-Bit Voltage Out DAC
• Manufacturer: Analog Devices

Specifications of AD7228

• Resolution (bits): 8bit
• Dac Update Rate: 200kSPS
• Dac Settling Time: 5µs
• Max Pos Supply (v): +16.5V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: Par

DUAL SUPPLY
Parameter
STATIC PERFORMANCE
REFERENCE INPUT
DIGITAL INPUTS
DYNAMIC PERFORMANCE
POWER SUPPLIES
SINGLE SUPPLY
STATIC PERFORMANCE
REFERENCE INPUT
DIGITAL INPUTS
DYNAMIC PERFORMANCE
POWER SUPPLIES
NOTES
1
2
3
4
AD7228A–SPECIFICATIONS
V
Temperature ranges are as follows:
Total Unadjusted Error includes zero code error, relative accuracy and full-scale error.
Calculated after zero code error has been adjusted out.
OUT
Resolution
Total Unadjusted Error
Relative Accuracy
Differential Nonlinearity
Full-Scale Error
Zero Code Error
@ 25 C
Minimum Load Resistance
Voltage Range
Input Resistance
Input Capacitance
AC Feedthrough
Input High Voltage, V
Input Low Voltage, V
Input Leakage Current
Input Capacitance
Input Coding
Voltage Output Slew Rate
Voltage Output Settling Time
Digital Feedthrough
Digital Crosstalk
V
V
I
I
Resolution
Total Unadjusted Error
Differential Nonlinearity
Minimum Load Resistance
Input Resistance
Input Capacitance
Voltage Output Slew Rate
Voltage Output Settling Time
Digital Feedthrough
Digital Crosstalk
V
I
B, C Versions; –40 C to +85 C
T, U Versions; –55 C to +125 C
DD
SS
DD
DD
SS
DD
T
Positive Full-Scale Change
Negative Full-Scale Change
@ 25 C
T
@ 25 C
T
Positive Full-Scale Change
Negative Full-Scale Change
@ 25 C
T
must be less than V
Range
MIN
MIN
MIN
MIN
Range
Range
to T
to T
to T
to T
MAX
MAX
MAX
MAX
1
4
6
6
5
5
5
DD
INL
INH
by 3.5 V to ensure correct operation.
3
3
(V
noted.) All specifications T
DD
5
5
(V
AII specifications T
= 10.8 V to 16.5 V; V
DD
= +15 V
B
Version
8
2
2 to 10
2
500
–70
2.4
0.8
8
Binary
2
5
5
50
50
10.8/16.5
–4.5/–5.5
16
20
14
18
8
2
2
500
2
5
7
50
50
13.5/16.5
16
20
2
1
1
1
25
30
1
2
1
As per Dual Supply Specifications
2
500
–70
50
50
10.8/16.5
–4.5/–5.5
20
18
10%, V
500
50
50
13.5/16.5
20
C
Version
8
2
2 to 10
2
2.4
0.8
8
Binary
2
5
5
16
14
8
2
2
2
5
7
16
1
1/2
1/2
15
20
1
1
1
1
MIN
SS
to T
SS
= –5 V
MIN
; = GND = 0 V; V
MAX
T
Version
8
2
2 to 10
2
500
–70
2.4
0.8
8
Binary
2
5
5
50
50
10.8/16.5
–4.5/–5.5
16
22
14
20
8
2
2
500
2
5
7
50
50
13.5/16.5
16
22
to T
2
1
1
1
25
30
1
2
1
unless otherwise noted.
MAX
10%; GND = 0 V; V
unless otherwise noted.
U
Version
8
2
2 to 10
2
500
–7 0
2.4
0.8
8
Binary
2
5
5
50
50
10.8/16.5
–4.5/–5.5
16
22
14
20
8
2
2
500
2
5
7
50
50
13.5/16.5
16
22
1
1/2
1
1/2
15
20
1
1
1
REF
–2–
= +10 V, R
5
6
Specifications subject to change without notice.
Sample tested at 25 C to ensure compliance.
The glitch impulse transferred to the output of one converter (not addressed) due to a
change in the digital input code to another addressed converter.
pF max
nV secs typ
V min/V max
V min/V max
pF max
nV secs typ
V min/V max
Units
Bits
LSB max
LSB max
LSB max
LSB max
mV max
mV max
k min
V min/V max
k min
dB typ
V min
V max
pF max
V/ s min
nV secs typ
mA max
mA max
mA max
mA max
Bits
LSB max
LSB max
k min
k min
V/ s min
nV secs typ
mA max
mA max
A max
s max
s max
s max
s max
REF
L
= +2 V to +10 V
= 2 k , C
For Specified Performance
For Specified Performance
Conditions/Comments
V
Guaranteed Monotonic
Typical tempco is 5 ppm/ C with V
Typical tempco is 30 V/ C
V
Occurs when each DAC is loaded with all 1s.
V
V
V
V
Code transition all 0s to all 1s. V
Code transition all 0s to all 1s. V
For Specified Performance
Outputs Unloaded; V
Outputs Unloaded; V
Guaranteed Monotonic
V
Occurs when each DAC is loaded with all 1s.
Settling Time to 1/2 LSB
Settling Time to 1/2 LSB
Code transition all 0s to all 1s. V
Code transition all 0s to all 1s. V
Outputs Unloaded; V
DD
OUT
REF
IN
REF
REF
OUT
L
= 100 pF unless otherwise noted.)
= 0 V or V
= +15 V
= 8 V p-p Sine Wave @ 10 kHz
= +10 V; Settling Time to 1/2 LSB
= +10 V; Settling Time to 1/2 LSB
= +10 V
= +10 V
1
; R
L
= 2 k , C
DD
10%, V
IN
IN
IN
REF
= V
= V
= V
L
= 100 pF unless otherwise
= +10 V
INL
INL
INL
or V
or V
or V
REF
REF
REF
REF
REF
INH
INH
INH
= 0 V; WR = V
= +10 V; WR = 0 V
= 0 V; WR = V
= +10 V, WR = 0 V
= +10 V
REV. A
DD
DD