ADM1060 Analog Devices, ADM1060 Datasheet - Page 32

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ADM1060

Manufacturer Part Number
ADM1060
Description
Multi Power Supply Sequencer & Supervisor
Manufacturer
Analog Devices
Datasheet

Specifications of ADM1060

# Supplies Monitored
7
Volt Monitoring Accuracy
2.5%
# Output Drivers
9
Fet Drive/enable Output
Both
Package
28 ld TSSOP

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ADM1060
Table 37. Programmable Delay Block (PDB) Registers
Hex
Addr.
0C
1C
2C
3C
4C
5C
6C
7C
8C
Table 38. PnPDBTIM Registers 0x0C, 0x1C, 0x2C, 0x3C, 0x4C, 0x5C, 0x6C, 0x7C, 0x8C
Bit
7–4
Name
TR3−TR0
Table
Table 38
Table 38
Table 38
Table 38
Table 38
Table 38
Table 38
Table 38
Table 38
R/W
W
Name
P1PDBTIM
P2PDBTIM
P3PDBTIM
P4PDBTIM
P5PDBTIM
P6PDBTIM
P7PDBTIM
P8PDBTIM
P9PDBTIM
Description
Programmed Rise Time
TR3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
TR2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Default
Power-On
Value
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
TR1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
TR0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
Delay for PDB1. Delay for rising edge and falling edge programmed separately.
Delay for PDB2. Delay for rising edge and falling edge programmed separately.
Delay for PDB3. Delay for rising edge and falling edge programmed separately.
Delay for PDB4. Delay for rising edge and falling edge programmed separately.
Delay for PDB5. Delay for rising edge and falling edge programmed separately.
Delay for PDB6. Delay for rising edge and falling edge programmed separately.
Delay for PDB7. Delay for rising edge and falling edge programmed separately.
Delay for PDB8. Delay for rising edge and falling edge programmed separately.
Delay for PDB9. Delay for rising edge and falling edge programmed separately.
Delay (ms)
0
1
2
5
10
20
40
60
80
100
150
200
250
300
400
500
Rev. B | Page 32 of 52
Bit
3–0
Name
TF3−TF0
W
R/W
Description
Programmed Fall Time
TF3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
TF2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TF1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
TF0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Delay (ms)
0
1
2
5
10
20
40
60
80
100
150
200
250
300
400
500

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