ADUC841 Analog Devices, ADUC841 Datasheet - Page 37

• Manufacturer Part Number: ADUC841
• Description: Precision Analog Microcontroller: 20MIPS 8052 Flash MCU + 8-Ch 12-Bit ADC + Dual 12-Bit DAC
• Manufacturer: Analog Devices

Specifications of ADUC841

• Mcu Core: 8052
• Mcu Speed (mips): 20
• Sram (bytes): 2304Bytes
• Gpio Pins: 34
• Adc # Channels: 8
• Other: PWM

CFG841
SFR Address
Power-On Default
Bit Addressable
Table 14. CFG841 SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
1
these bits so all instructions to the CFG841 register should use the ORL, XRL, or ANL instructions. Value of 10H is for 11.0592 MHz crystal.
Note that the Flash/EE controller bits EPM2, EPM1, EPM0 are set to their correct values depending on the crystal frequency at power-up. The user should not modify
Name
EXSP
PWPO
DBUF
EPM2
EPM1
EPM0
MSPI
XRAMEN
Description
Extended SP Enable.
When set to 1 by the user, the stack rolls over from SPH/SP = 00FFH to 0100H.
When set to 0 by the user, the stack rolls over from SP = FFH to SP = 00H.
PWM Pin Out Selection.
Set to 1 by the user to select P3.4 and P3.3 as the PWM output pins.
Set to 0 by the user to select P2.6 and P2.7 as the PWM output pins.
DAC Output Buffer.
Set to 1 by the user to bypass the DAC output buffer.
Set to 0 by the user to enable the DAC output buffer.
Flash/EE Controller and PWM Clock Frequency Configuration Bits.
Frequency should be configured such that F
EPM2
0
0
0
0
1
1
Set to 1 by the user to move the SPI functionality of MISO, MOSI, and SCLOCK to P3.3, P3.4, and P3.5,
respectively.
Set to 0 by the user to leave the SPI functionality as usual on MISO, MOSI, and SCLOCK pins.
XRAM Enable Bit.
When set to 1 by the user, the internal XRAM is mapped into the lower two kBytes of the external address
space.
When set to 0 by the user, the internal XRAM is not accessible, and the external data memory is mapped into
the lower two kBytes of external data memory.
ADuC841 Config SFR
AFH
10H
No
0
EPM1
0
1
1
0
0
1
0
0
EPM0
1
0
1
1
32
Divide Factor
64
128
256
512
1024
Rev. 0 | Page 37 of 88
OSC
/Divide Factor = 32 kHz + 50%.
ADuC841/ADuC842/ADuC843