ADUC824 Analog Devices, ADUC824 Datasheet - Page 65

• Manufacturer Part Number: ADUC824
• Description: Precision Analog Microcontroller: 1MIPS 8052 MCU + 8kB Flash + 16/24-Bit ADC + 12-Bit DAC
• Manufacturer: Analog Devices

Specifications of ADUC824

• Mcu Core: 8052
• Mcu Speed (mips): 1
• Sram (bytes): 256Bytes
• Gpio Pins: 34
• Adc # Channels: 4

In all of these scenarios, and in more complicated real-life appli-
cations, keep in mind the flow of current from the supplies and
back to ground. Make sure the return paths for all currents are
as close as possible to the paths the currents took to reach their
destinations. For example, do not power components on the
analog side of Figure 52b with DV
return currents from DV
avoid digital currents flowing under analog circuitry, which could
happen if the user placed a noisy digital chip on the left half
of the board in Figure 52c. Whenever possible, avoid large
discontinuities in the ground plane(s) (such as are formed by a
long trace on the same layer), since they force return signals to
travel a longer path. And of course, make all connections to the
ground plane directly, with little or no trace separating the pin
from its via to ground.
If the user plans to connect fast logic signals (rise/fall time < 5 ns)
to any of the ADuC824’s digital inputs, add a series resistor to
each relevant line to keep rise and fall times longer than 5 ns at
the ADuC824 input pins. A value of 100 Ω or 200 Ω is usually
sufficient to prevent high-speed signals from coupling capacitively
into the ADuC824 and affecting the accuracy of ADC conversions.
ADuC824 System Self-Identification
In some hardware designs it may be an advantage for the soft-
ware running on the ADuC824 target to identify the host Micro-
Converter. For example, code running on the ADuC824 may be
used at future date to run on an ADuC816 MicroConverter host
and the code may be required to operate differently.
The CHIPID SFR is a read-only register located at SFR address
C2 hex. The top nibble of this byte is set to ‘0’ to designate
an ADuC824 host. For an ADuC816 host, the CHIPID SFR
will contain the value ‘1’ in the upper nibble.
C
A
B
PLACE ANALOG
COMPONENTS
COMPONENTS HERE
PLACE ANALOG
PLACE ANALOG
COMPONENTS
HERE
AGND
AGND
HERE
DD
to flow through AGND. Also, try to
GND
DD
since that would force
COMPONENTS HERE
PLACE DIGITAL
COMPONENTS
PLACE DIGITAL
PLACE DIGITAL
COMPONENTS
HERE
HERE
DGND
DGND
OTHER HARDWARE CONSIDERATIONS
To facilitate in-circuit programming, plus in-circuit debug and
emulation options, users will want to implement some simple
connection points in their hardware that will allow easy access
to download, debug, and emulation modes.
In-Circuit Serial Download Access
Nearly all ADuC824 designs will want to take advantage of the
in-circuit reprogrammability of the chip. This is accomplished by a
connection to the ADuC824’s UART, which requires an external
RS-232 chip for level translation if downloading code from a PC.
Basic configuration of an RS-232 connection is illustrated in
Figure 53 with a simple ADM202-based circuit. If users would
rather not design an RS-232 chip onto a board, refer to Application
Note, uC006 – A 4-Wire UART-to-PC Interface for a simple
(and zero-cost-per-board) method of gaining in-circuit serial
download access to the ADuC824.
In addition to the basic UART connections, users will also need
a way to trigger the chip into download mode. This is accom-
plished via a 1 kΩ pull-down resistor that can be jumpered
onto the PSEN pin, as shown in Figure 53. To get the ADuC824
into download mode, simply connect this jumper and power-
cycle the device (or manually reset the device, if a manual reset
button is available) and it will be ready to receive a new program
serially. With the jumper removed, the device will come up in
normal mode (and run the program) whenever power is cycled or
RESET is toggled.
Note that PSEN is normally an output (as described in the Exter-
nal Memory Interface section) and it is sampled as an input only
on the falling edge of RESET (i.e., at power-up or upon an external
manual reset). Note also that if any external circuitry uninten-
tionally pulls PSEN low during power-up or reset events, it could
cause the chip to enter download mode and therefore fail to begin
user code execution as it should. To prevent this, ensure that no
external signals are capable of pulling the PSEN pin low, except
for the external PSEN jumper itself.
Embedded Serial Port Debugger
From a hardware perspective, entry to serial port debug mode is
identical to the serial download entry sequence described above. In
fact, both serial download and serial port debug modes can be
thought of as essentially one mode of operation used in two differ-
ent ways.
Note that the serial port debugger is fully contained on the
ADuC824 device, (unlike “ROM monitor” type debuggers) and
therefore no external memory is needed to enable in-system
debug sessions.
Single-Pin Emulation Mode
Also built into the ADuC824 is a dedicated controller for
single-pin in-circuit emulation (ICE) using standard production
ADuC824 devices. In this mode, emulation access is gained by
connection to a single pin, the EA pin. Normally, this pin is hard-
wired either high or low to select execution from internal or
external program memory space, as described earlier. To enable
single-pin emulation mode, however, users will need to pull the
EA pin high through a 1 kΩ resistor as shown in Figure 53. The
emulator will then connect to the 2-pin header also shown in
Figure 53. To be compatible with the standard connector that
Application note uC006 is available at www.analog.com/microconverter
ADuC824