LPC1112FDH28 NXP Semiconductors, LPC1112FDH28 Datasheet - Page 34

The LPC1112FDH28 is an ARM Cortex-M0 based, low-cost 32-bit MCU, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/

LPC1112FDH28

Manufacturer Part Number
LPC1112FDH28
Description
The LPC1112FDH28 is an ARM Cortex-M0 based, low-cost 32-bit MCU, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
Table 11.
[1]
[2]
[3]
[4]
[5]
[6]
LPC111X
Product data sheet
Symbol
XTALIN
XTALOUT
V
SS
Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled (pins pulled up to full V
IA = inactive, no pull-up/down enabled.
See
reset the chip and wake up from Deep power-down mode. An external pull-up resistor is required on this pin for the Deep power-down
mode.
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see
I
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see
When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
2
C-bus pads compliant with the I
Figure 46
LPC1100XL series: LPC1113/14/15 pin description table (LQFP48 package)
for the reset pad configuration. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to
Pin
6
7
5; 41
[6]
[6]
Start
logic
input
-
-
-
2
C-bus specification for I
Type
I
O
I
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 1 March 2012
Reset
state
[1]
-
-
-
2
C standard mode and I
Description
Input to the oscillator circuit and internal clock generator circuits.
Input voltage must not exceed 1.8 V.
Output from the oscillator amplifier.
Ground.
LPC1110/11/12/13/14/15
2
C Fast-mode Plus.
32-bit ARM Cortex-M0 microcontroller
…continued
Figure
DD
© NXP B.V. 2012. All rights reserved.
45).
level (V
DD
Figure
= 3.3 V));
34 of 103
45).

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