LPC2478 NXP Semiconductors, LPC2478 Datasheet - Page 67
LPC2478
Manufacturer Part Number
LPC2478
Description
NXP Semiconductors designed the LPC2478 microcontroller, powered by theARM7TDMI-S core, to be a highly integrated microcontroller for a wide range ofapplications that require advanced communications and high quality graphic displays
Manufacturer
NXP Semiconductors
Datasheet
1.LPC2478.pdf
(93 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2478
Manufacturer:
NXP
Quantity:
10 000
Company:
Part Number:
LPC2478-STK-MICTOR
Manufacturer:
Olimex Ltd.
Quantity:
135
Company:
Part Number:
LPC2478FBD
Manufacturer:
NXP
Quantity:
17
Company:
Part Number:
LPC2478FBD208
Manufacturer:
NXP
Quantity:
5 000
Company:
Part Number:
LPC2478FBD208
Manufacturer:
NXP/44
Quantity:
99
Company:
Part Number:
LPC2478FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
LPC2478FBD208,551
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
LPC2478FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 17.
C
T
[1]
LPC2478
Product data sheet
Symbol
Common
t
t
t
t
t
t
t
t
t
t
t
t
Read cycle parameters
t
t
Write cycle parameters
t
t
d(SV)
h(S)
d(RASV)
h(RAS)
d(CASV)
h(CAS)
d(WV)
h(W)
d(GV)
h(G)
d(AV)
h(A)
su(D)
h(D)
d(QV)
h(Q)
cy(CCLK)
L
= 30 pF, T
See
Figure
= 1/CCLK
Dynamic characteristics: Dynamic external memory interface
amb
Parameter
chip select valid delay
time
chip select hold time
row address strobe valid
delay time
row address strobe hold
time
column address strobe
valid delay time
column address strobe
hold time
write valid delay time
write hold time
output enable valid delay
time
output enable hold time
address valid delay time
address hold time
data input set-up time
data input hold time
data output valid delay
time
data output hold time
18.
=
40
C to 85
C, V
DD(DCDC)(3V3)
Conditions
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 12 September 2011
= V
DD(3V3)
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
= 3.3 V, EMC Dynamic Read Config Register = 0x1 (RD = 01),
Min
-
4 + T
-
3 + T
-
4 + T
-
4 + T
-
4 + T
-
4 + T
2.6 + T
2.6 + T
-
3.8 + T
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
Single-chip 16-bit/32-bit microcontroller
Typ
3 + T
3 + T
3 + T
2.3 + T
3.4 + T
3 + T
3.4 + T
3 + T
3 + T
2.1 + T
2.6 + T
2.3 + T
1.5 + T
1.3 + T
2.6 + T
3.4 + T
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
Max
1.5 + T
-
1.5 + T
-
2.1 + T
-
2.1 + T
-
1.3 + T
-
1.4 + T
-
-
-
3 + T
-
LPC2478
© NXP B.V. 2011. All rights reserved.
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
cy(CCLK)
67 of 93
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns