P89LPC92X1 NXP Semiconductors, P89LPC92X1 Datasheet
P89LPC92X1
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P89LPC92X1 Summary of contents
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P89LPC9201/9211/922A1/9241/ 9251 8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB byte-erasable flash with 8-bit ADC Rev. 2 — 1 December 2010 1. General description The P89LPC9201/9211/922A1/9241/9251 is a single-chip microcontroller, available in low cost packages, ...
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... Four interrupt priority levels. Eight keypad interrupt inputs, plus two additional external interrupt inputs. Schmitt trigger port inputs. Second data pointer. Emulation support. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 December 2010 8-bit microcontroller with 8-bit ADC © ...
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... P89LPC922A1FN P89LPC9241FDH P89LPC9251FDH 3.1 Ordering options Table 2. Type number P89LPC9201FDH P89LPC9211FDH P89LPC922A1FDH P89LPC922A1FN P89LPC9241FDH P89LPC9251FDH P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Ordering information Package Name Description TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm TSSOP20 plastic thin shrink small outline package; 20 leads ...
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... Block diagram P89LPC9201/9211/922A1 P3[1:0] CONFIGURABLE I/Os P1[7:0] CONFIGURABLE I/Os P0[7:0] CONFIGURABLE I/Os PROGRAMMABLE OSCILLATOR DIVIDER XTAL1 CRYSTAL OR RESONATOR XTAL2 Fig 1. Block diagram (P89LPC9201/9211/922A1) P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ HIGH PERFORMANCE ACCELERATED 2-CLOCK 80C51 CPU 2 kB/4 kB/8 kB CODE FLASH internal bus 256-BYTE DATA RAM PORT 3 PORT 1 PORT 0 KEYPAD INTERRUPT CPU ...
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... NXP Semiconductors P89LPC9241/9251 P3[1:0] CONFIGURABLE I/Os P1[7:0] CONFIGURABLE I/Os P0[7:0] CONFIGURABLE I/Os PROGRAMMABLE OSCILLATOR DIVIDER XTAL1 CRYSTAL OR RESONATOR XTAL2 Fig 2. Block diagram (P89LPC9241/9251) P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ HIGH PERFORMANCE ACCELERATED 2-CLOCK 80C51 CPU 4 kB/8 kB CODE FLASH internal bus 256-BYTE DATA RAM PORT 3 PORT 1 PORT 0 KEYPAD INTERRUPT CPU ...
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... Fig 3. Functional diagram (P89LPC9201/9211/922A1) KBI0 AD10 KBI1 AD11 KBI2 AD12 KBI3 DAC1 AD13 KBI4 KBI5 KBI6 KBI7 CLKOUT Fig 4. Functional diagram (P89LPC9241/9251) P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241 CMP2 CIN2B CIN2A CIN1B PORT 0 CIN1A P89LPC9201/ CMPREF 9211/922A1 CMP1 T1 XTAL2 PORT 3 XTAL1 ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 5. Fig 6. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ P0.0/CMP2/KBI0 1 P1 P1.6 4 P1.5/RST P89LPC9241/9251 P3.1/XTAL1 6 P3.0/XTAL2/CLKOUT 7 8 P1.4/INT1 9 P1.3/INT0/SDA P1.2/T0/SCL 10 P89LPC9241/9251 TSSOP20 pin configuration P0.0/CMP2/KBI0 1 2 P1.7 3 P1.6 P1.5/RST P89LPC9201/9211/ P3.1/XTAL1 6 7 P3.0/XTAL2/CLKOUT 8 P1.4/INT1 P1.3/INT0/SDA 9 P1.2/T0/SCL 10 P89LPC9201/9211/922A1 TSSOP20 pin configuration All information provided in this document is subject to legal disclaimers. Rev. 2 — ...
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... NXP Semiconductors Fig 7. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ P89LPC922A1 P0.0/CMP2/KBI0 1 2 P1.7 3 P1.6 4 P1.5/RST P3.1/XTAL1 P3.0/XTAL2/CLKOUT 7 P1.4/INT1 8 P1.3/INT0/SDA 9 P1.2/T0/SCL 10 P89LPC922A1 DIP20 pin configuration All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 December 2010 8-bit microcontroller with 8-bit ADC 20 P0 ...
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... KBI3/AD12 P0.4/CIN1A/ 17 KBI4/DAC1/AD13 P0.5/CMPREF/ 16 KBI5 P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Type Description I/O Port 0: Port 8-bit I/O port with a user-configurable output type. During reset Port 0 latches are configured in the input only mode with the internal pull-up disabled. The operation of Port 0 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to 7.16.1 “ ...
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... P1.1/RXD 11 P1.2/T0/SCL 10 P1.3/INT0/SDA 9 P1.4/INT1 8 P1.5/RST 4 P1.6 3 P1.7 2 P3.0 to P3.1 P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Type Description I/O P0.6 — Port 0 bit 6. High current source. O CMP1 — Comparator 1 output. I KBI6 — Keyboard input 6. I/O P0.7 — Port 0 bit 7. High current source. I/O T1 — Timer/counter 1 external count input or overflow output. I KBI7 — ...
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... P3.1/XTAL1 [1] Input/output for P1.0 to P1.4, P1.6, P1.7. Input for P1.5. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Type Description I/O P3.0 — Port 3 bit 0. O XTAL2 — Output from the oscillator amplifier (when a crystal oscillator option is selected via the flash configuration). O CLKOUT — CPU clock divided by 2 when enabled via SFR bit (ENCLK -TRIM.6). ...
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... P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ All information provided in this document is subject to legal disclaimers. ...
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Table 4. Special function registers - P89LPC9201/9211/922A1 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address E7 ACC* Accumulator E0H AUXR1 Auxiliary A2H CLKLP function register Bit address ...
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Table 4. Special function registers - P89LPC9201/9211/922A1 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB FMCON Program flash E4H BUSY control (Read) Program flash E4H FMCMD.7 control (Write) FMDATA Program flash E5H ...
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Table 4. Special function registers - P89LPC9201/9211/922A1 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB IP0H Interrupt B7H - priority 0 high Bit address FF IP1* Interrupt F8H - priority 1 IP1H ...
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Table 4. Special function registers - P89LPC9201/9211/922A1 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB PCON Power control 87H SMOD1 register PCONA Power control B5H RTCPD register A Bit address D7 PSW* ...
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Table 4. Special function registers - P89LPC9201/9211/922A1 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address 8F TCON* Timer 0 and 1 88H TF1 control TH0 Timer 0 high 8CH TH1 ...
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Table 5. Extended special function registers - P89LPC9201/9211/922A1 Name Description SFR Bit functions and addresses addr. BODCFG BOD FFC8H configuration register CLKCON CLOCK Control FFDEH CLKOK register RTCDATH Real-time clock FFBFH data register high RTCDATL Real-time clock FFBEH data register ...
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Table 6. Special function registers - P89LPC9241/9251 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address E7 ACC* Accumulator E0H ADCON0 A/D control 8EH ENBI0 register 0 ADCON1 A/D control 97H ...
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Table 6. Special function registers - P89LPC9241/9251 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB AD1DAT1 A/D_0 data D6H register 1 AD1DAT2 A/D_0 data D7H register 2 AD1DAT3 A/D_0 data F5H register ...
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Table 6. Special function registers - P89LPC9241/9251 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB FMADRH Program flash E7H address high FMADRL Program flash E6H address low FMCON Program flash E4H BUSY ...
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Table 6. Special function registers - P89LPC9241/9251 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address BF IP0* Interrupt B8H - priority 0 IP0H Interrupt B7H - priority 0 high Bit ...
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Table 6. Special function registers - P89LPC9241/9251 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB P3M1 Port 3 output B1H - mode 1 P3M2 Port 3 output B2H - mode 2 PCON ...
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Table 6. Special function registers - P89LPC9241/9251 * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB SP Stack pointer 81H TAMOD Timer 0 and 1 8FH - auxiliary mode Bit address 8F TCON* ...
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Table 7. Extended special function registers - P89LPC9241/9251 Name Description SFR Bit functions and addresses addr. BODCFG BOD FFC8H configuration register CLKCON CLOCK Control FFDEH CLKOK register TPSCON Temperature FFCAH sensor control register RTCDATH Real-time clock FFBFH data register high ...
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... High speed oscillator option This option supports an external crystal in the range of 4 MHz to 18 MHz. Ceramic resonators are also supported in this configuration. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Figure 8) and can also be optionally divided to a slower frequency (see is defined as the OSCCLK frequency ...
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... CLKOK bit in CLKCON register is used to indicate the clock switch status. CLKOK is cleared when starting clock source switch and set when completed. Notice that when CLKOK is ‘0’, writing to CLKCON register is not allowed. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ ⁄ ...
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... However, if CCLK is 8 MHz or slower, the CLKLP SFR bit (AUXR1.7) can be set to logic 1 to lower the power consumption further. On any reset, CLKLP is logic 0 allowing highest performance access. This bit can then be set in software if CCLK is running at 8 MHz or slower. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ OSCCLK ...
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... The highest priority interrupt service cannot be interrupted by any other interrupt source. If two requests of different priority levels are pending at the start of an instruction, the request of higher priority level is serviced. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ On-chip data memory usages ...
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... If an external interrupt is enabled when the P89LPC9201/9211/922A1/9241/9251 is put into Power-down or Idle mode, the interrupt will cause the processor to wake-up and resume operation. Refer to P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Section 7.18 “Power reduction modes” All information provided in this document is subject to legal disclaimers. ...
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... ENADCI0 (1) ADCI0 (1) ENADCI1 (1) ADCI1 (1) ENBI0 (1) BNDI0 (1) ENBI1 (1) BNDI1 (1) EAD (1) P89LPC9241/9251. Fig 9. Interrupt sources, interrupt enables, and power-down wake-up sources P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ IE0 EX0 IE1 EX1 BOIF EBO KBIF EKBI EWDRT CMF2 CMF1 EC EA (IE0.7) TF0 ET0 TF1 ET1 ...
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... The open-drain output configuration turns off all pull-ups and only drives the pull-down transistor of the port driver when the port latch contains a logic used as a logic output, a port configured in this manner must have an external pull-up, typically a resistor tied to V P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Number of I/O pins available ...
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... Power monitoring functions The P89LPC9201/9211/922A1/9241/9251 incorporates power monitoring functions designed to prevent incorrect operation during initial power-up and power loss or reduction during operation. This is accomplished with two hardware functions: Power-on detect and brownout detect. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Table 11 “Limiting values”. ...
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... In Power-down mode, the power supply voltage may be reduced to the data retention supply voltage V Power-down mode was entered. SFR contents are not guaranteed after V lowered to V this case exited. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Table 12 “Static characteristics” . This retains the RAM contents at the point where DDR ...
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... A Watchdog reset is similar to a power-on reset, both POF and BOF are set but the other flag bits are cleared. • For any other reset, previously set flag bits that have not been cleared will remain set. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ must fall below V DD Table 12 “ ...
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... Mode 3 it can still be used by the serial port as a baud rate generator. 7.20.5 Mode 6 In this mode, the corresponding timer can be changed to a PWM with a full period of 256 timer clocks. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ All information provided in this document is subject to legal disclaimers. ...
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... Or, for example, the parity bit (P, in the PSW) could be moved into TB8. When data is received, the 9 bit is not saved. The baud rate is programmable to either frequency, as determined by the SMOD1 bit in PCON. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ selection”). th data bit, and a stop bit (logic 1). When data is th data bit (TB8 in SCON) can be assigned the value of logic 0 or logic 1 ...
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... UART. If enabled, the UART allows writing to SBUF while the previous data is being shifted out. Double buffering is only allowed in Modes 1, 2 and 3. When operated in Mode 0, double buffering must be disabled (DBMOD = 0). P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ th timer 1 overflow ...
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... The I A typical I P89LPC9201/9211/922A1/9241/9251 device provides a byte-oriented I that supports data transfers up to 400 kHz. Fig 11. I P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ bit (bit 8) in double buffering (modes 1, 2 and 3) 2 C-bus may be used for test and diagnostic purposes. 2 ...
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... Otherwise the output is a zero. Each comparator may be configured to cause an interrupt when the output value changes. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ P1.3 ...
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... Comparators and power reduction modes Either or both comparators may remain enabled when Power-down or Idle mode is activated, but both comparators are disabled automatically in Total Power-down mode. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ = 2.4 V. ...
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... CPU is powered down, the watchdog is disabled. The watchdog timer has a time-out period that ranges from a few μ few seconds. Please refer to the P89LPC9201/9211/922A1/9241/9251 User manual for more details. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ All information provided in this document is subject to legal disclaimers. ...
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... On-chip erase and write timing generation contribute to a user-friendly programming interface. The P89LPC9201/9211/922A1/9241/9251 flash reliably stores memory contents even after 100,000 erase and program cycles. The cell is designed to optimize the erase and P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ ÷32 ...
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... Instead, this device provides a 32-bit CRC result on either a sector or the entire user code space. Remark: When voltage supply is lower than 2.4 V, the BOD FLASH is tripped and flash erase/program is blocked. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ All information provided in this document is subject to legal disclaimers. ...
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... When the Boot Status bit is set to a value other than zero, the contents of the Boot Vector are used as the high byte of the execution address and the low byte is set to 00H. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ All information provided in this document is subject to legal disclaimers. ...
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... The P89LPC9241/9251 has two analog-to-digital converter modules: ADC0 and ADC1. ADC1 is an 8-bit, 4-channel multiplexed successive approximation analog-to-digital converter. ADC0 is dedicated for on-chip temperature sensor which operates over wide P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ shows the factory default Boot Vector setting for these devices. A ...
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... Interrupt or polled operation. Boundary limits interrupt. DAC output to a port pin with high output impedance. Clock divider. Power-down mode. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 December 2010 8-bit microcontroller with 8-bit ADC Figure 15 “ ...
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... The user may select whether an interrupt can be generated after every four conversions. Additional conversion results will again cycle through the four result register, overwriting the previous results. Continuous conversions continue until terminated by the user. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ input MUX ...
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... An A/D conversion is started by rising or falling edge of P1.4. Once a conversion has started, additional edge triggers are ignored until the conversion has completed. The edge triggered start mode is available in all ADC operating modes. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ All information provided in this document is subject to legal disclaimers. ...
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... Idle mode when the conversion is completed if the A/D interrupt is enabled. In Power-down mode or Total Power-down mode, the A/D and temperature sensor do not function. If temperature sensor or the A/D are enabled, they will consume power. Power can be reduced by disabling temperature sensor and A/D. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ All information provided in this document is subject to legal disclaimers. ...
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... Parameters are valid over ambient temperature range unless otherwise specified. All voltages are with respect to V otherwise noted. [2] Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor. Fig 16. Frequency vs. supply voltage P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ [1] Conditions on XTAL1, XTAL2 pin to V ...
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... V voltage on any other pin n C input capacitance iss I LOW-level input current IL I input leakage current LI I HIGH-LOW transition THL current P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Conditions MHz DD osc MHz DD osc MHz DD osc V = 3.6 V ...
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... Measured with port in quasi-bidirectional mode. [10] Measured with port in high-impedance mode. [11] Port pins source a transition current when used in quasi-bidirectional mode and externally driven from logic 1 to logic 0. This current is highest when V is approximately P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ …continued Conditions pin RST All information provided in this document is subject to legal disclaimers. Rev. 2 — ...
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... NXP Semiconductors 10.1 Current characteristics Note: The graphs provided are a statistical summary based on a limited number of samples and only for information purposes. The performance characteristics listed are not tested or guaranteed. (mA) Fig 17. I (mA) Fig 18. I P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241 ...
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... NXP Semiconductors (mA) Fig 19. I (mA) Fig 20. I P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241 2.4 2.8 Test conditions: normal mode, code while(1) {} executed from on-chip flash; using an external clock. vs. frequency at +85 °C DD(oper) 5 4.0 3.0 2.0 1.0 0.0 2.4 2.8 Test conditions: Idle mode entered executing code from on-chip flash; using an external clock with no active peripherals, with the following functions disabled: real-time clock and watchdog timer. vs. frequency at +25 ° ...
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... NXP Semiconductors (mA) Fig 21. I (mA) Fig 22. I P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ 5 4.0 3.0 2.0 1.0 0.0 2.4 2.8 Test conditions: Idle mode entered executing code from on-chip flash; using an external clock with no active peripherals, with the following functions disabled: real-time clock and watchdog timer. vs. frequency at −40 °C DD(idle) 5 ...
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... NXP Semiconductors (μA) (1) +85 °C (2) +25 °C (3) −40 °C Fig 23. I (μA) (1) +85 °C (2) −40 °C (3) +25 °C Fig 24. I P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ 20 18.0 16.0 14.0 12.0 10.0 2.4 2.8 Test conditions: Power-down mode, using internal RC oscillator with the following functions disabled: comparators, real-time clock, and watchdog timer. ...
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... The performance characteristics listed are not tested or guaranteed. frequency deviation (%) Fig 25. Average internal RC oscillator frequency vs. V frequency deviation (%) Fig 26. Average internal RC oscillator frequency vs. V P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ 0.2 0.1 0 −0.1 −0.2 2.4 2.8 Central frequency of internal RC oscillator = 7.3728 MHz ...
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... NXP Semiconductors frequency deviation (%) Fig 27. Average internal RC oscillator frequency vs. V frequency deviation (%) Fig 28. Average watchdog oscillator frequency vs. V P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ 0.2 0 −0.2 −0.4 −0.6 2.4 2.8 Central frequency of internal RC oscillator = 7.3728 MHz 2.5 1.5 0.5 −0.5 −1.5 2.4 2.8 Central frequency of watchdog oscillator = 400 kHz All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors frequency deviation (%) Fig 29. Average watchdog oscillator frequency vs. V frequency deviation (%) Fig 30. Average watchdog oscillator frequency vs. V P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ 0.5 −0.5 −1.5 −2.5 −3.5 2.4 2.8 Central frequency of watchdog oscillator = 400 kHz 1.5 0.5 −0.5 −1.5 −2.5 2.4 2.8 Central frequency of watchdog oscillator = 400 kHz All information provided in this document is subject to legal disclaimers. Rev. 2 — ...
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... BOD EEPROM/FLASH V trip voltage trip [1] Typical ratings are not guaranteed. The values listed are at room temperature Fig 31. BOD interrupt/reset characteristics P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Conditions falling stage BOICFG1, BOICFG0 = 01 BOICFG1, BOICFG0 = 10 BOICFG1, BOICFG0 = 11 rising stage BOICFG1, BOICFG0 = 01 ...
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... XHDV rising edge time [1] Parameters are valid over operating temperature range unless otherwise specified. [2] Parts are tested to 2 MHz, but are guaranteed to operate down to 0 Hz. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Conditions nominal f = 7.3728 MHz 7.189 trimmed to ± ° ...
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... XHDV rising edge time [1] Parameters are valid over operating temperature range unless otherwise specified. [2] Parts are tested to 2 MHz, but are guaranteed to operate down to 0 Hz. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Conditions nominal f = 7.3728 MHz trimmed to ± °C; clock ...
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... C for industrial applications, unless otherwise specified. amb Symbol Parameter t V active to RST active delay VR DD time t RST HIGH time RH t RST LOW time RL Fig 34. ISP entry waveform P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ T XLXL t XHQX XHDX valid valid valid valid ...
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... I input leakage current LI [1] This parameter is characterized, but not tested in production. P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Conditions 0 V < V < All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 December 2010 ...
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... ADC conversion time ADC Temperature sensor V sensor voltage sen TC temperature coefficient t start-up time startup start trigger 1 2 adc_clk clk serial_data_out ADCDATA_REG Fig 35. ADC conversion timing P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Ω . Conditions 0 kHz to 100 kHz ADC enabled = +0 °C T amb All information provided in this document is subject to legal disclaimers. Rev. 2 — ...
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... E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. Fig 36. ADC characteristics P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ (2) 1 LSB (ideal (LSB ) IA ideal All information provided in this document is subject to legal disclaimers. Rev. 2 — 1 December 2010 ...
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... Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT360-1 Fig 37. TSSOP20 package outline (SOT360-1) P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241 2.5 scale ...
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... DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION IEC SOT146-1 Fig 38. DIP20 package outline (SOT146-1) P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241 scale (1) ( 1.73 0.53 0.36 26.92 6.40 1.30 0.38 0.23 26 ...
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... EPROM EEPROM EMI PLL PWM RAM RC RTC SAR SFR UART WDT P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Abbreviations Description Analog-to-Digital Converter Brownout Detection Central Processing Unit Cyclic Redundancy Check Digital-to-Analog Converter Erasable Programmable Read-Only Memory Electrically Erasable Programmable Read-Only Memory ...
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... Table • Table • Section • Section • Changed data sheet status to Product. P89LPC92X v.1 20090416 P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ Data sheet status Product data sheet 11: Updated table. 17: Updated I max value. LI 7.4: Added low speed oscillator information. 7.26: Added low speed oscillator information. ...
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... This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ [3] Definition This document contains data from the objective specification for product development ...
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... NXP Semiconductors’ specifications such use shall be solely at customer’s 17. Contact information For more information, please visit: For sales office addresses, please send an email to: P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... Push-pull output configuration . . . . . . . . . . . . 33 7.16.2 Port 0 analog functions . . . . . . . . . . . . . . . . . . 33 7.16.3 Additional port features 7.17 Power monitoring functions . . . . . . . . . . . . . . 33 7.17.1 Brownout detection . . . . . . . . . . . . . . . . . . . . . 34 7.17.2 Power-on detection 7.18 Power reduction modes . . . . . . . . . . . . . . . . . 34 7.18.1 Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 7.18.2 Power-down mode . . . . . . . . . . . . . . . . . . . . . 34 P89LPC92X1 Product data sheet P89LPC9201/9211/922A1/9241/ 7.18.3 Total Power-down mode . . . . . . . . . . . . . . . . 35 7.19 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 7.19.1 Reset vector 7.20 Timers/counters 0 and 7.20.1 Mode 7.20.2 Mode 7.20.3 Mode ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 1 December 2010 Document identifier: P89LPC92X1 ...