PSMN025-100D NXP Semiconductors, PSMN025-100D Datasheet - Page 8
![SiliconMAX standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology](/photos/41/50/415037/sot428_3d_sml.gif)
PSMN025-100D
Manufacturer Part Number
PSMN025-100D
Description
SiliconMAX standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology
Manufacturer
NXP Semiconductors
Datasheet
1.PSMN025-100D.pdf
(14 pages)
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NXP Semiconductors
PSMN025-100D
Product data sheet
Fig 10. Sub-threshold drain current as a function of
Fig 12. Drain-source on-state resistance as a function
0.16
0.14
0.12
0.08
0.06
0.04
0.02
1.0E-01
1.0E-02
1.0E-03
1.0E-04
1.0E-05
1.0E-06
0.1
0
0
Drain-Source On Resistance, RDS(on) (Ohms)
4 V
gate-source voltage
of drain current; typical values
0
Drain current, ID (A)
2
4.2 V
0.5
4
1
4.4 V
Gate-source voltage, VGS (V)
minimum
6
Drain Current, ID (A)
1.5
8
4.6 V
2
typical
10
2.5
12
3
14
4.8 V
All information provided in this document is subject to legal disclaimers.
3.5
16
maximum
8 V
VGS = 10V
Tj = 25 C
4
18
Rev. 4 — 12 January 2012
lma020
5 V
4.5
6V
lma025
20
5
N-channel TrenchMOS SiliconMAX standard level FET
Fig 11. Normalized drain source on-state resistance
Fig 13. Gate-source voltage as a function of gate
2.9
2.7
2.5
2.3
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
-60
0
Gate-source voltage, VGS (V)
Normalised On-state Resistance
Tj = 25 C
ID = 45 A
5
factor as a function of junction temperature
charge; typical values
-40
10 15 20 25 30 35 40 45 50 55 60 65 70 75 80
-20
Junction temperature, Tj (C)
0
20
Gate charge, QG (nC)
PSMN025-100D
40
VDD = 20 V
60
80
100 120 140 160 180
© NXP B.V. 2012. All rights reserved.
VDD = 80 V
lma023
lma027
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