STM8TL53G4 STMicroelectronics, STM8TL53G4 Datasheet - Page 29

• Manufacturer Part Number: STM8TL53G4
• Description: 8-bit, ultra-low-power, touch-sensing MCUs with 16-Kbyte Flash and proximity detection
• Manufacturer: STMicroelectronics

Specifications of STM8TL53G4

• Operating Power Supply: 1.65 V to 3.6 V
• Temperature Range: –40 °C to 85 °C
• 4 Low Power Modes: Wait, Active-halt with AWU (1 μA), Active-halt with ProxSense™ (10 μA with scan every 200 ms),Halt (0.4 μA)
• Dynamic Power Consumption: 150 μA/MHz
• Fast Wakeup From Halt Mode: 4.7 μs
• Ultralow Leakage Per I/o: 50 nA

STM8TL53xx
Table 6.
1. Refer to
0x00 7F6F
0x00 7F8F
0x00 7F9A
0x00 7F60
0x00 7F70
0x00 7F71
0x00 7F72
0x00 7F73
0x00 7F74
0x00 7F75
0x00 7F76
0x00 7F77
0x00 7F78
0x00 7F79
0x00 7F80
0x00 7F81
0x00 7F90
0x00 7F91
0x00 7F92
0x00 7F93
0x00 7F94
0x00 7F95
0x00 7F96
0x00 7F97
0x00 7F98
0x00 7F99
0x00 7F61
Address
list of external interrupt registers.
to
to
Table 5: General hardware register map on page 22
CPU/SWIM/debug module/interrupt controller registers (continued)
ITC-SPR
Block
SWIM
CFG
DM
(1)
Register label
DM_ENFCTR
SWIM_CSR
DM_BK1RE
DM_BK1RH
DM_BK2RE
DM_BK2RH
DM_BK1RL
DM_BK2RL
CFG_GCR
ITC_SPR1
ITC_SPR2
ITC_SPR3
ITC_SPR4
ITC_SPR5
ITC_SPR6
ITC_SPR7
ITC_SPR8
DM_CSR1
DM_CSR2
DM_CR1
DM_CR2
Doc ID 022344 Rev 1
Reserved area (15 bytes)
Reserved area (15 bytes)
Reserved area (2 bytes)
Debug module control/status register 1
Debug module control/status register 2
Breakpoint 1 register extended byte
Breakpoint 2 register extended byte
Interrupt Software priority register 1
Interrupt Software priority register 2
Interrupt Software priority register 3
Interrupt Software priority register 4
Interrupt Software priority register 5
Interrupt Software priority register 6
Interrupt Software priority register 7
Interrupt Software priority register 8
Debug module control register 1
Debug module control register 2
Breakpoint 1 register high byte
Breakpoint 2 register high byte
Breakpoint 1 register low byte
Breakpoint 2 register low byte
Global configuration register
SWIM control status register
Enable function register
(addresses 0x00 50A0 to 0x00 50A5) for a
Register name
Memory and register map
status
Reset
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0x00
0x00
0x00
0x00
0x10
0x00
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