ST72561R9 STMicroelectronics, ST72561R9 Datasheet - Page 43

• Manufacturer Part Number: ST72561R9
• Description: 8-BIT MCU WITH FLASH OR ROM, 10-BIT ADC, 5 TIMERS, SPI, LINSCI(TM), ACTIVE CAN
• Manufacturer: STMicroelectronics

Specifications of ST72561R9

• Hdflash Endurance: 100 cycles, data retention 40 years at 85°C
• 5 Power Saving Modes: Halt, Auto Wake Up From Halt, Active Halt, Wait and Slow

POWER SAVING MODES (Cont’d)
8.6 AUTO WAKE-UP FROM HALT MODE
Auto Wake-Up From Halt (AWUFH) mode is simi-
lar to Halt mode with the addition of an internal RC
oscillator for wake-up. Compared to ACTIVE
HALT mode, AWUFH has lower power consump-
tion because the main clock is not kept running,
but there is no accurate realtime clock available.
It is entered by executing the HALT instruction
when the AWUEN bit in the AWUCSR register has
been set and the OIE bit in the MCCSR register is
cleared (see
tails).
Figure 29. AWUFH Mode Block Diagram
As soon as HALT mode is entered, and if the
AWUEN bit has been set in the AWUCSR register,
the AWU RC oscillator provides a clock signal
(f
er and a programmable prescaler controlled by the
AWUPR register. The output of this prescaler pro-
vides the delay time. When the delay has elapsed
the AWUF flag is set by hardware and an interrupt
wakes up the MCU from Halt mode. At the same
time the main oscillator is immediately turned on
Figure 30. AWUF Halt Timing Diagram
AWUFH interrupt
f
AWU_RC
f
AWU_RC
CPU
f
AWU_RC
AWU RC
oscillator
divider
/64
). Its frequency is divided by a fixed divid-
RUN MODE
Section 10.2 on page 59
to Timer input capture
prescaler
AWUFH
/1 .. 255
HALT MODE
(ei0 source)
for more de-
AWUFH
interrupt
t
AWU
and a 256 or 4096 cycle delay is used to stabilize
it. After this start-up delay, the CPU resumes oper-
ation by servicing the AWUFH interrupt. The AWU
flag and its associated interrupt are cleared by
software reading the AWUCSR register.
To compensate for any frequency dispersion of
the AWU RC oscillator, it can be calibrated by
measuring the clock frequency f
calculating the right prescaler value. Measurement
mode is enabled by setting the AWUM bit in the
AWUCSR register in Run mode. This connects
f
lowing the f
oscillator clock as a reference timebase.
Similarities with Halt mode
The following AWUFH mode behavior is the same
as normal Halt mode:
– The MCU can exit AWUFH mode by means of
– When entering AWUFH mode, the I[1:0] bits in
– In AWUFH mode, the main oscillator is turned off
– The compatibility of Watchdog operation with
AWU_RC
any interrupt with exit from Halt capability or a re-
set (see
the CC register are forced to 10b to enable inter-
rupts. Therefore, if an interrupt is pending, the
MCU wakes up immediately.
causing all internal processing to be stopped, in-
cluding the operation of the on-chip peripherals.
None of the peripherals are clocked except those
which get their clock supply from another clock
generator (such as an external or auxiliary oscil-
lator like the AWU oscillator).
AWUFH mode is configured by the WDGHALT
option bit in the option byte. Depending on this
setting, the HALT instruction when executed
while the Watchdog system is enabled, can gen-
erate a Watchdog RESET.
256 or 4096 t
to the ICAP1 input of the 16-bit timer, al-
Section 8.4 "HALT
AWU_RC
to be measured using the main
CPU
MODE").
RUN MODE
AWU_RC
Clear
by software
ST72561
and then
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