ST72324BK2 STMicroelectronics, ST72324BK2 Datasheet - Page 17

• Manufacturer Part Number: ST72324BK2
• Description: 5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72324BK2

• Hdflash Endurance: 1 kcycle at 55 °C, data retention 40 years at 85 °C
• Clock Sources: crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
• 4 Power Saving Modes: Slow, Wait, Active-halt, and Halt

ST72324Bxx
Table 2.
10 5
11 6
12 7
13 8
14 9
15 10
16 11
17 12
18 13
19 14
20 15
6
7
8
9
Pin No.
1
2
3
4
30
31
32
3
4
1
2
5
6
7
10
Legend / Abbreviations for
Device pin description
a. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up column
b. In the open drain output column, ‘T’ defines a true open drain I/O (P-Buffer and protection diode to V
1 PB4 (HS)
2 PD0/AIN0
3 PD1/AIN1
4 V
5 V
6 PF0/MCO/AIN8 I/O C
7 PF1 (HS)/BEEP I/O C
8
9
(wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input, else the
configuration is floating interrupt input.
implemented). See
PD2/AIN2
PD3/AIN3
PD4/AIN4
PD5/AIN5
PF2 (HS)
PF4/OCMP1_A/
AIN10
PF6
(HS)/ICAP1_A
PF7 (HS)/
EXTCLK_A
AREF
Type:
Input level:
In/Output level: C = CMOS 0.3V
Output level:
Port and control configuration:
SSA
Pin Name
(1)
(1)
Input:
Output: OD = open drain
float = floating, wpu = weak pull-up, int = interrupt
Section 9: I/O ports
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
S
S
I = input, O = output, S = supply
A = Dedicated analog input
C
HS = 20 mA high sink (on N-buffer only)
T
Level
T
T
T
T
T
T
T
T
T
T
T
T
T
= CMOS 0.3V
Table 2:
HS
HS
HS
HS
HS
X
X
X
X
X
X
X
X
X
X
X
X
X
and
(b)
X
X
X
X
X
X
X
X
X
, PP = push-pull
Input
DD
Section 12.9: I/O port pin characteristics
ei3
ei1
ei1
ei1
DD
/0.7
/0.7
Port
DD
X
X
X
X
X
X
X
X
DD
Output
X
X
X
X
X
X
X
X
X
X
X
X
X
with input trigger
X
X
X
X
X
X
X
X
X
X
X
X
X
Analog Reference Voltage for ADC
Analog Ground Voltage
Port F0
Port F1
Port F2
Port F4
Port F6
Port F7
function
Port B4
Port D0
Port D1
Port D2
Port D3
Port D4
Port D5
reset)
(after
Main
ADC Analog Input 5
Main clock
out (f
Beep signal output
Timer A
Output
Compare 1
Timer A Input Capture 1
Timer A External Clock
Source
(a)
, ana = analog ports
Alternate Function
ADC Analog Input 0
ADC Analog Input 1
ADC Analog Input 2
ADC Analog Input 3
ADC Analog Input 4
for more details.
CPU
Pin description
)
ADC
Analog
Input 8
ADC
Analog
Input 10
DD
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