ST72324BK2 STMicroelectronics, ST72324BK2 Datasheet - Page 49
ST72324BK2
Manufacturer Part Number
ST72324BK2
Description
5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
Manufacturer
STMicroelectronics
Datasheet
1.ST72324BJ6.pdf
(193 pages)
Specifications of ST72324BK2
Hdflash Endurance
1 kcycle at 55 °C, data retention 40 years at 85 °C
Clock Sources
crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
4 Power Saving Modes
Slow, Wait, Active-halt, and Halt
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ST72324Bxx
7.6.2
External interrupt control register (EICR)
Table 19.
Table 20.
EICR
7:6 IS1[1:0]
4:3 IS2[1:0]
1:0
Bit
5
2
IS11
IS11
R/W
0
0
1
1
7
Name
IPB
IPA
-
EICR register description
Interrupt sensitivity - ei2
IS10
ei2 and ei3 sensitivity
Interrupt Polarity (for port B)
ei0 and ei1 sensitivity
Interrupt Polarity (for port A)
Reserved, must always be kept cleared
0
1
0
1
IS10
R/W
The interrupt sensitivity, defined using the IS1[1:0] bits, is applied to the following
external interrupts:
- ei2 for port B [3:0] (see
- ei3 for port B4 (see
Bits 7 and 6 can only be written when I1 and I0 of the CC register are both set to 1
(level 3).
This bit is used to invert the sensitivity of port B [3:0] external interrupts. It can be
set and cleared by software only when I1 and I0 of the CC register are both set to 1
(level 3).
0: No sensitivity inversion
1: Sensitivity inversion
The interrupt sensitivity, defined using the IS2[1:0] bits, is applied to the following
external interrupts:
- ei0 for port A[3:0] (see
- ei1 for port F[2:0] (see
Bits 4 and 3 can only be written when I1 and I0 of the CC register are both set to 1
(level 3).
This bit is used to invert the sensitivity of port A [3:0] external interrupts. It can be
set and cleared by software only when I1 and I0 of the CC register are both set to 1
(level 3).
0: No sensitivity inversion.
1: Sensitivity inversion.
6
Falling edge and low level
R/W
IPB
5
Falling edge only
Rising edge only
IPB bit = 0
Table
IS21
R/W
Table
Table
Table
4
21)
External interrupt sensitivity
23)
22)
20)
Rising and falling edge
Function
IS20
R/W
3
R/W
IPA
Rising edge and high level
2
Reset value: 0000 0000 (00h)
Falling edge only
Rising edge only
IPB bit = 1
1
Reserved
-
Interrupts
0
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