ST72124J2 STMicroelectronics, ST72124J2 Datasheet - Page 40
ST72124J2
Manufacturer Part Number
ST72124J2
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY,ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
Manufacturer
STMicroelectronics
Datasheet
1.ST72124J2.pdf
(153 pages)
Specifications of ST72124J2
Clock Sources
crystal/ceramic resonator oscillators or RC oscillators, external clock, backup Clock Security System
4 Power Saving Modes
Halt, Active-Halt, Wait and Slow
Two 16-bit Timers With
2 input captures (only one on timer A), 2 output compares (only one on timer A), External clock input on timer A, PWM and Pulse generator modes
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ST72334J/N, ST72314J/N, ST72124J
I/O PORTS (Cont’d)
Figure 26. I/O Port General Block Diagram
Table 6. I/O Port Mode Options
Legend: NI - not implemented
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Input
Output
REGISTER
ACCESS
SOURCE (ei
EXTERNAL
INTERRUPT
Off - implemented not activated
On - implemented and activated
DDR SEL
OR SEL
DR SEL
Floating with/without Interrupt
Pull-up with/without Interrupt
Push-pull
Open Drain (logic level)
True Open Drain
Configuration Mode
DDR
OR
x
DR
)
POLARITY
SELECTION
ALTERNATE
OUTPUT
ALTERNATE
ENABLE
If implemented
1
0
FROM
OTHER
BITS
1
0
Pull-Up
Off
On
Off
NI
Note: The diode to V
true open drain pads. A local protection between
the pad and V
vice against positive stress.
N-BUFFER
PULL-UP
CONFIGURATION
P-Buffer
Off
On
Off
NI
SS
SCHMITT
TRIGGER
CMOS
is implemented to protect the de-
V
DD
DD
NI (see note)
is not implemented in the
to V
On
DD
P-BUFFER
(see table below)
V
Diodes
DD
DIODES
(see table below)
PULL-UP
(see table below)
ALTERNATE
ANALOG
INPUT
to V
INPUT
PAD
On
SS
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