DS2460 Maxim, DS2460 Datasheet

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DS2460

Manufacturer Part Number
DS2460
Description
The DS2460 SHA-1 Coprocessor with EEPROM is a hardware implementation of the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1), eliminating the need to develop software to perform the complex SHA computation required for authenticating SHA devices and fo
Manufacturer
Maxim
Datasheet

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Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
www.maxim-ic.com
GENERAL DESCRIPTION
The DS2460 SHA-1 Coprocessor with EEPROM is a
hardware implementation of the ISO/IEC 10118-3
Secure Hash Algorithm (SHA-1), eliminating the need
to develop software to perform the complex SHA
computation required for authenticating SHA devices
and for performing the validation of digitally signed
service data. The DS2460 communicates with a
microcontroller through the popular I²C interface.
Applications include hosts of access control and
electronic payment systems for token authentication
and service data validation as well as generation of
one-time-use encryption keys for short message
encryption and decryption for messages not exceed-
ing the length of a SHA-1 result, which is 20 bytes.
APPLICATIONS
License Management
Secure Feature Control
System Authentication
Clone Prevention
Door Locks
Utility Meters
TYPICAL OPERATING CIRCUIT
3/10
V
CC
GND
µC
V
CC
SDA
SCL
R
P
R
P
SDA
SCL
GND
V
CC
AD0
AD1
AD2
Abridged Data Sheet
1 of 9
SHA-1 Coprocessor with EEPROM
FEATURES
ORDERING INFORMATION
+Denotes a lead(Pb)-free/RoHS-compliant package.
Request full data sheet at:
www.maxim-ic.com/fullds/DS2460
PIN CONFIGURATION
DS2460S
DS2460S/T&R
DS2460S+
DS2460S+T&R
Dedicated Hardware-Accelerated SHA Engine
for Generating SHA-1 MACs
112 Bytes User EEPROM for Storing End
Equipment Property Data
I²C Host Interface, Supports 100kHz and 400kHz
Communication Speeds
Three Address Inputs for I²C Address
Assignment
Single-Byte to 8-Byte EEPROM Write
Sequences
64-Bit Unique Registration Number
EEPROM Endurance: 200k Cycles per 8-Byte
Block at 25°C
10ms max EEPROM Write Cycle
Wide Operating Range: 2.7V to 5.5V,
-40°C to +85°C
±4kV IEC 1000-4-2 ESD Protection Level on All
Pins
8-Pin SO (150 mils) Package
PART
GND
AD0
AD1
AD2
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
TEMP RANGE
1
2
3
4
8
7
6
5
V
SCL
SDA
N.C.
CC
DS2460
8 SO (150 mils)
8 SO (150 mils)
8 SO (150 mils)
8 SO (150 mils)
PIN-PACKAGE

DS2460 Summary of contents

Page 1

... GENERAL DESCRIPTION The DS2460 SHA-1 Coprocessor with EEPROM is a hardware implementation of the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1), eliminating the need to develop software to perform the complex SHA computation required for authenticating SHA devices and for performing the validation of digitally signed service data. The DS2460 communicates with a microcontroller through the popular I² ...

Page 2

... Lead Temperature (soldering 10s) Soldering Temperature (reflow) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied ...

Page 3

... DS2460. The DS2460 communicates with a host processor through its I²C bus interface in standard-mode or in fast-mode. The logic state of three address pins determines the I²C slave address of the DS2460, allowing devices to operate on the same bus segment without requiring a hub. For more information (including Figure 2) refer to the full version of the data sheet ...

Page 4

... For this section (including Figure 3) please refer to the full version of the data sheet. DEVICE OPERATION The typical use of the DS2460 in an application involves writing, reading, running the SHA-1 engine, transferring secrets and comparing MACs. All these activities are controlled through the I²C serial interface. ...

Page 5

... Slave Address The slave address to which the DS2460 responds is shown in Figure 5. The logic states at the address pins AD0, AD1 and AD2 determine the value of the address bits A0, A2, and A4. The address pins allow the device to respond to one of eight possible slave addresses. The slave address is part of the slave-address/control byte. The last bit of the slave-address/control byte (R/W) defines the data direction. When set subsequent data will flow from master to slave (write access mode) ...

Page 6

Repeated START Condition Repeated starts are commonly used for read accesses to select a specific data source or address to read from. The master can use a repeated START condition at the end of a data transfer to immediately initiate ...

Page 7

... Application Information SDA and SCL Pullup Resistors SDA is an open-drain output on the DS2460 that requires a pullup resistor (Figure 10) to realize high logic levels. Because the DS2460 uses SCL only as input (no clock stretching) the master can drive SCL either through an open-drain/collector output with a pullup resistor or a push-pull output. ...

Page 8

... I²C Bus Compliance Although the I²C protocol definition does not explicitly forbid a START - STOP - START sequence, the DS2460 does not tolerate it START, STOP, START sequence has been issued, transmit the following sequence before communicating with the DS2460: START, 10xxxxxx byte (x = don’t care bits), ACK/NACK bit, STOP. ...

Page 9

... Maxim Integrated Products. Maxim is a registered trademark of Maxim Integrated Products, Inc. Abridged Data Sheet DESCRIPTION and changed specification value to 40 years minimum. RET specification. PROG the right to change the circuitry and specifications without notice at any time DS2460 PAGES CHANGED — ...

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