73S1215F Maxim, 73S1215F Datasheet - Page 29

• Manufacturer Part Number: 73S1215F
• Description: The Teridian 73S1215F is a self-contained SoC smart card reader IC that is an ideal solution for any USB-connected ISO 7816 design
• Manufacturer: Maxim

DS_1215F_003
External Interrupt Control Register (INT5Ctl): 0xFF94
Miscellaneous Control Register 0 (MISCtl0): 0xFFF1
Rev. 1.4
MISCtl0.7
MISCtl0.6
MISCtl0.5
MISCtl0.4
MISCtl0.3
MISCtl0.2
MISCtl0.1
MISCtl0.0
INT5Ctl.7
INT5Ctl.6
INT5Ctl.5
INT5Ctl.4
INT5Ctl.3
INT5Ctl.2
INT5Ctl.1
INT5Ctl.0
Bit
Bit
MSB
PDMUX
MSB
PWRDN
PWRDN
Symbol
RTCIEN
RTCINT
USBIEN
USBINT
Symbol
PDMUX
SLPBK
KPIEN
KPINT
SSEL
–
–
–
–
–
–
–
–
When set = 1, enables interrupts from USB, RTC, Keypad (normally going to
int5), Smart Card interrupts (normally going to int4), or USR(7:0) pins (int0) to
cause interrupt on int0. The assertion of the interrupt to int0 is delayed by
512 MPU clocks to allow the analog circuits, including the clock system, to
stabilize. This bit must be set prior to asserting the PWRDN bit in order to
properly configure the interrupts that will wake up the circuit. This bit is reset
= 0 when this register is read.
RTC interrupt flag.
USB interrupt flag.
This bit sets the circuit into a low-power condition. All analog (high speed
oscillator and VCO/PLL) functions are disabled 32 MPU clock cycles after
this bit is set = 1. This allows time for the next instruction to set the STOP bit
in the
set to operate from the 32kHz oscillator. The MPU is not operative in this
mode. When set, this bit overrides the individual control bits that otherwise
control power consumption.
RTC interrupt enable.
USB interrupt enable.
Keypad interrupt enable.
Keypad interrupt flag.
UART loop back testing mode.
Serial port pins select.
RTCIEN RTCINT USBIEN
PCON
–
Table 16: The MISCtl0 Register
Table 15: The INT5Ctl Register
register to stop the CPU core. The RTC will stay active if it is
–
–
0x00
0x00
Function
Function
USBINT
–
SLPBK
KPIEN
SSEL
73S1215F Data Sheet
KPINT
LSB
LSB
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