73S1215F Maxim, 73S1215F Datasheet - Page 63
73S1215F
Manufacturer Part Number
73S1215F
Description
The Teridian 73S1215F is a self-contained SoC smart card reader IC that is an ideal solution for any USB-connected ISO 7816 design
Manufacturer
Maxim
Datasheet
1.73S1215F.pdf
(136 pages)
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DS_1215F_003
I2C Secondary Read Data Register (SRDR): 0XFF84
I2C Control and Status Register (CSR): 0xFF85
Rev. 1.4
CSR.7
CSR.6
CSR.5
CSR.4
CSR.3
CSR.2
CSR.1
CSR.0
MSB
Bit
SRDR.7
SRDR.7
SRDR.6
SRDR.5
SRDR.4
SRDR.3
SRDR.2
SRDR.1
SRDR.0
Bit
MSB
–
Symbol
I2CLEN
AKERR
Second Data byte to be read from the I
and Status register (CSR) is set = 1.
I2CST
SRDR.6
–
–
–
–
–
–
Set to 1 if acknowledge bit from Slave Device is not 0. Automatically reset
when the new bus transaction is started.
Write a 1 to start I
transaction is done. This bit should be treated as a “busy” indicator on
reading. If it is high, the serial read/write operations are not completed and
no new address or data should be written.
Set to 1 for 2-byte read or write operations. Set to 0 for 1-byte operations.
SRDR.5
–
Table 67: The SRDR Register
Table 68: The CSR Register
SRDR.4
–
2
C transaction. Automatically reset to 0 when the bus
0x00
SRDR.3
Function
–
2
C slave device if bit 0 (I2CLEN) of the Control
0x00
Function
AKERR
SRDR.2
I2CST
SRDR.1
73S1215F Data Sheet
I2CLEN
LSB
SRDR.0
LSB
63
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