73S1215F Maxim, 73S1215F Datasheet - Page 97
73S1215F
Manufacturer Part Number
73S1215F
Description
The Teridian 73S1215F is a self-contained SoC smart card reader IC that is an ideal solution for any USB-connected ISO 7816 design
Manufacturer
Maxim
Datasheet
1.73S1215F.pdf
(136 pages)
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DS_1215F_003
External Smart Card Control Register (SCECtl): 0xFE0B
Used to directly set and sample signals of External Smart Card interface. There are three modes of
asynchronous operation, an “automatic sequence” mode, and bypass mode. Clock stop per the ISO
7816-3 interface is also supported but firmware must handle the protocol for SIO and SCLK for I
stop and start. Control for Reset (to make RST signal), activation control, voltage select, etc. should be
handled via the I
C4, C8 functions if necessary.
Rev. 1.4
MSB
SCECtl.7
SCECtl.6
SCECtl.5
SCECtl.4
SCECtl.3
SCECtl.2
SCECtl.1
SCECtl.0
Bit
–
SCLKOFF
SCLKLVL
Symbol
2
C interface when using external 73S73S8010x devices. USR(n) pins shall be used for
SIOD
–
SIO
–
–
–
–
SIO
External Smart Card I/O. Bit when read indicates state of pin SIO for
SIOD = 1 (Caution, this signal is not synchronized to the MPU clock), when
written, sets state of pin SIO for SIOD = 0. Ignored if not in bypass or sync
modes. In sync mode, this bit will contain the value of IO pin on the latest
rising edge of SCLK.
1 = input, 0 = output. External Smart Card I/O Direction control. Ignored if
not in bypass or sync modes.
Sets the state of SCLK when disabled by SCLKOFF bit. If in bypass mode,
this bit directly controls the state of SCLK.
0 = SCLK enabled, 1 = SCLK disabled. When disabled, SCLK level is
determined by SCLKLVL. This bit has no effect if in bypass mode.
Table 91: The SCECtl Register
SIOD
–
Function
0x00
–
SCLKLVL SCLKOFF
73S1215F Data Sheet
LSB
2
C clock
97
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