74LVT125DB,112 NXP Semiconductors, 74LVT125DB,112 Datasheet - Page 13

IC BUFF TRI-ST QD N-INV 14SSOP

74LVT125DB,112

Manufacturer Part Number
74LVT125DB,112
Description
IC BUFF TRI-ST QD N-INV 14SSOP
Manufacturer
NXP Semiconductors
Series
74LVTr
Datasheet

Specifications of 74LVT125DB,112

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 64mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-SSOP
Logic Family
LVT
Number Of Channels Per Chip
4
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Low Level Output Current
64 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
4 / 4
Output Type
3-State
Propagation Delay Time
2.9 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVT125DB
74LVT125DB
935180980112
Philips Semiconductors
Fig 12. Package outline SOT762-1 (DHVQFN14)
74LVT_LVTH125_6
Product data sheet
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT762-1
max.
A
1
(1)
terminal 1
index area
0.05
0.00
A 1
terminal 1
index area
E h
L
0.30
0.18
14
1
b
IEC
- - -
0.2
2
c
13
e
D
3.1
2.9
0
(1)
1.65
1.35
D h
e 1
D h
D
MO-241
JEDEC
E
2.6
2.4
(1)
b
REFERENCES
Rev. 06 — 6 March 2006
1.15
0.85
E h
9
6
0.5
e
7
8
JEITA
B
- - -
e
scale
w
v
2.5
e 1
2
M
M
A
E
C
C
0.5
0.3
A
L
74LVT125; 74LVTH125
B
0.1
v
0.05
w
y 1 C
A
A 1
0.05
y
PROJECTION
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
EUROPEAN
5 mm
0.1
y 1
3.3 V quad buffer; 3-state
detail X
X
C
y
ISSUE DATE
02-10-17
03-01-27
c
SOT762-1
13 of 16

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