74LVT125DB,112 NXP Semiconductors, 74LVT125DB,112 Datasheet - Page 3

• Manufacturer Part Number: 74LVT125DB,112
• Description: IC BUFF TRI-ST QD N-INV 14SSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVTr

Specifications of 74LVT125DB,112

• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 4
• Number Of Bits Per Element: 1
• Current - Output High, Low: 32mA, 64mA
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-SSOP
• Logic Family: LVT
• Number Of Channels Per Chip: 4
• Polarity: Non-Inverting
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 32 mA
• Low Level Output Current: 64 mA
• Minimum Operating Temperature: - 40 C
• Number Of Lines (input / Output): 4 / 4
• Output Type: 3-State
• Propagation Delay Time: 2.9 ns at 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74LVT125DB; 74LVT125DB; 935180980112

Philips Semiconductors
5. Functional diagram
6. Pinning information
74LVT_LVTH125_6
Product data sheet
6.1 Pinning
Fig 1. Logic symbol
Fig 3. Logic diagram
Fig 4. Pin configuration SO14, SSOP14
and TSSOP14
GND
1OE
2OE
1A
1Y
2A
2Y
10
12
13
1
2
3
4
5
6
7
2
1
5
4
9
1OE
2OE
3OE
4OE
1A
2A
3A
4A
125
001aac476
mna228
Rev. 06 — 6 March 2006
1Y
2Y
3Y
4Y
nOE
nA
11
14
13
12
11
10
3
6
8
9
8
V
4OE
4A
4Y
3OE
3A
3Y
CC
74LVT125; 74LVTH125
Fig 2. IEC logic symbol
Fig 5. Pin configuration DHVQFN14
(1) The die substrate is attached to the
index area
terminal 1
exposed die pad using conductive die
attach material. It can not be used as
a supply pin or input.
2OE
mna227
1A
1Y
2A
2Y
10
12
13
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
2
1
5
4
9
nY
Transparent top view
2
3
4
5
6
3.3 V quad buffer; 3-state
EN1
GND
125
mna229
1
(1)
13
12
11
10
11
9
3
6
8
001aac477
4OE
4A
4Y
3OE
3A
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