74LVC07ABQ,115 NXP Semiconductors, 74LVC07ABQ,115 Datasheet - Page 9

• Manufacturer Part Number: 74LVC07ABQ,115
• Description: IC BUFF HEX OPEN DRAIN 14DHVQFN
• Manufacturer: NXP Semiconductors
• Series: 74LVCr

Specifications of 74LVC07ABQ,115

• Package / Case: 14-VQFN Exposed Pad, 14-HVQFN, 14-SQFN, 14-DHVQFN
• Logic Type: Buffer/Line Driver, Non-Inverting with Open Drain
• Number Of Elements: 6
• Number Of Bits Per Element: 1
• Current - Output High, Low: 32mA, 32mA
• Voltage - Supply: 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Logic Family: LVC
• Number Of Channels Per Chip: 6
• Polarity: Non-Inverting
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.65 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Input Bias Current (max): 10 uA
• Low Level Output Current: 32 mA
• Minimum Operating Temperature: - 40 C
• Output Type: Open Drain
• Propagation Delay Time: 2.4 ns (Typ) @ 2.7 V or 2.2 ns (Typ) @ 3.3 V or 1.6 ns (Typ) @ 5 V
• Package: 14DHVQFN EP
• Logic Function: Buffer/Driver
• Number Of Outputs Per Chip: 6
• Input Signal Type: Single-Ended
• Maximum Propagation Delay Time @ Maximum Cl: 2.4(Typ)@2.7V|2.2(Typ)@3.3V|1.6(Typ)@5V ns
• Tolerant I/os: 5 V
• Typical Quiescent Current: 0.1 uA
• Number Of Lines (input / Output): 6 / 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2992-2; 935273332115

Philips Semiconductors
AC WAVEFORMS
2003 Nov 11
handbook, full pagewidth
handbook, full pagewidth
Hex buffer with open-drain outputs
Definitions for test circuits:
R
C
R
<2.7 V
1.65 to 1.95 V
2.3 to 2.7 V
2.7 V
3.0 to 3.6 V
4.5 to 5.5 V
L
L
T
2.7 to 3.6 V
4.5 to 5.5 V
= Load resistor.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to the output impedance Z
V
CC
V
CC
0.5
1.5 V
0.5
2
2
6 V
6 V
2
V
V
V
V
CC
CC
V
V
V
M
ext
CC
CC
CC
nA input
nY output
Fig.6 The input nA to output nY propagation delays.
MNA530
GENERATOR
GND
V CC
V
V
2.7 V
2.7 V
V
V OL
V
V
V
CC
CC
CC
V I
OL
OL
OL
PULSE
Fig.7 Load circuitry for switching times.
V
+ 0.15 V
+ 0.3 V
+ 0.3 V
I
V
X
V M
t PLZ
30 pF
30 pF
50 pF
50 pF
50 pF
V I
C
L
o
R T
V X
of the pulse generator.
9
D.U.T.
V CC
1 k
500
500
500
500
R
V O
L
t PZL
C L
V ext
R L
R L
V M
MNA528
Product specification
74LVC07A