74ABT544PW,112 NXP Semiconductors, 74ABT544PW,112 Datasheet

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74ABT544PW,112

Manufacturer Part Number
74ABT544PW,112
Description
IC TRANSCVR 3ST 8BIT INV 24TSSOP
Manufacturer
NXP Semiconductors
Series
74ABTr
Datasheet

Specifications of 74ABT544PW,112

Logic Type
Transceiver, Inverting
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
32mA, 64mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-2487-5
935178850112
1. General description
2. Features and benefits
3. Ordering information
Table 1.
Type number
74ABT544D
74ABT544DB
74ABT544PW
Ordering information
Package
Temperature range Name
−40 °C to +85 °C
−40 °C to +85 °C
−40 °C to +85 °C
The 74ABT544 high performance BiCMOS device combines low static and dynamic
power dissipation with high speed and high output drive.
The 74ABT544 octal latched transceiver contains two sets of D-type latches for temporary
storage of data flowing in either direction. Separate latch enable (LEAB, LEBA) and output
enable (OEAB, OEBA) inputs are provided for each register to permit independent control
of data transfer in either direction. The outputs are guaranteed to sink 64 mA.
74ABT544
Octal latched transceiver with dual enable; 3-state
Rev. 05 — 20 May 2010
Combines 74ABT640 and 74ABT373 type functions in one device
8-bit octal transceiver with D-type latch
Back-to-back registers for storage
Separate controls for data flow in each direction
Live insertion and extraction permitted
Output capability: +64 mA to −32 mA
Power-up 3-state
Power-up reset
Latch-up protection exceeds 500 mA per JESD78B class II level A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
SO24
SSOP24
TSSOP24
Description
plastic small outline package; 24 leads;
body width 7.5 mm
plastic shrink small outline package; 24 leads;
body width 5.3 mm
plastic thin shrink small outline package; 24 leads;
body width 4.4 mm
Product data sheet
Version
SOT137-1
SOT340-1
SOT355-1

Related parts for 74ABT544PW,112

74ABT544PW,112 Summary of contents

Page 1

Octal latched transceiver with dual enable; 3-state Rev. 05 — 20 May 2010 1. General description The 74ABT544 high performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT544 octal ...

Page 2

... NXP Semiconductors 4. Functional diagram EAB 23 EBA 14 LEAB 1 LEBA Fig 1. Logic symbol OEBA EBA LEBA Fig 3. Logic diagram 74ABT544 Product data sheet Octal latched transceiver with dual enable; 3-state OEAB 13 OEBA 2 001aae900 Fig DETAIL DETAIL A × All information provided in this document is subject to legal disclaimers. ...

Page 3

... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 4. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin LEBA 1 OEBA EAB 11 GND 12 OEAB 13 LEAB 22, 21, 20, 19, 18, 17, 16, 15 EBA 74ABT544 Product data sheet Octal latched transceiver with dual enable; 3-state 74ABT544 1 LEBA ...

Page 4

... NXP Semiconductors 6. Functional description 6.1 Function table [1] Table 3. Function selection Input OEXX EXX ↑ [ HIGH voltage level HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition of LEXX or EXX ( BA LOW voltage level LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition of LEXX or EXX ( BA); ...

Page 5

... NXP Semiconductors 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O I input clamping current IK I output clamping current OK I output current ...

Page 6

... NXP Semiconductors Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter V power-up LOW-level OL(pu) output voltage I input leakage current I I power-off leakage OFF current I power-up/power-down O(pu/pd) output current I OFF-state output OZ current I output leakage current HIGH-state output current O I supply current CC Δ ...

Page 7

... NXP Semiconductors Table 7. Dynamic characteristics GND = 0 V; for test circuit, see Figure Symbol Parameter Conditions t HIGH to LOW An; see PHL propagation delay LEBA LEAB to Bn; see t OFF-state to HIGH OEBA to An, OEAB to Bn; see PZH propagation delay EBA to An, EAB to Bn; see t OFF-state to LOW OEBA to An, OEAB to Bn ...

Page 8

... NXP Semiconductors and V are typical voltage output levels that occur with the output load Fig 6. Propagation delay latch enable (LEAB, LEBA) to output (An, Bn) OEAB, OEBA 1 typical voltage output level that occurs with the output load. OH Fig 7. Propagation delay 3-state output enable to HIGH-level and output disable from HIGH-level ...

Page 9

... NXP Semiconductors An, Bn LEAB, LEBA, EAB, EBA The shaded areas indicate when the input is permitted to change for predictable output performance. Fig 9. Data set-up and hold times and latch enable pulse width negative V M pulse positive V M pulse Input pulse definition ...

Page 10

... NXP Semiconductors 12. Package outline SO24: plastic small outline package; 24 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 mm 2.65 0.25 0.1 2.25 0.012 0.096 inches 0.1 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 11

... NXP Semiconductors SSOP24: plastic shrink small outline package; 24 leads; body width 5 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION IEC SOT340-1 Fig 12. Package outline SOT340-1 (SSOP24) ...

Page 12

... NXP Semiconductors TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 13

... Modifications: Table 6 74ABT544_4 20100115 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. 74ABT544_3 20050420 74ABT544_2 20021118 74ABT544 19930701 ...

Page 14

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 15

... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 16. Contact information For more information, please visit: For sales office addresses, please send an email to: 74ABT544 Product data sheet Octal latched transceiver with dual enable ...

Page 16

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 6.1 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 11 Waveforms ...

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