74ABT544PW,112 NXP Semiconductors, 74ABT544PW,112 Datasheet - Page 7
74ABT544PW,112
Manufacturer Part Number
74ABT544PW,112
Description
IC TRANSCVR 3ST 8BIT INV 24TSSOP
Manufacturer
NXP Semiconductors
Series
74ABTr
Datasheet
1.74ABT544PW112.pdf
(16 pages)
Specifications of 74ABT544PW,112
Logic Type
Transceiver, Inverting
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
32mA, 64mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-2487-5
935178850112
935178850112
NXP Semiconductors
Table 7.
GND = 0 V; for test circuit, see
11. Waveforms
74ABT544
Product data sheet
Symbol Parameter
t
t
t
t
t
t
t
t
t
t
PHL
PZH
PZL
PHZ
PLZ
su(H)
su(L)
h(H)
h(L)
WL
Fig 5.
HIGH to LOW
propagation delay
OFF-state to HIGH
propagation delay
OFF-state to LOW
propagation delay
HIGH to OFF-state
propagation delay
LOW to OFF-state
propagation delay
set-up time HIGH
set-up time LOW
hold time HIGH
hold time LOW
pulse width LOW
V
V
Propagation delay input (An, Bn) to output (Bn, An)
M
OL
Dynamic characteristics
= 1.5 V
and V
OH
are typical voltage output levels that occur with the output load.
Figure
Conditions
An to Bn or Bn to An; see
LEBA to An or LEAB to Bn; see
OEBA to An, OEAB to Bn; see
EBA to An, EAB to Bn; see
OEBA to An, OEAB to Bn; see
EBA to An, EAB to Bn; see
OEBA to An, OEAB to Bn; see
EBA to An, EAB to Bn; see
OEBA to An, OEAB to Bn; see
EBA to An, EAB to Bn; see
An to LEAB, Bn to LEBA; see
An to EAB, Bn to EBA; see
An to LEAB, Bn to LEBA; see
An to EAB, Bn to EBA; see
LEAB to An, LEBA to Bn; see
EAB to An, EBA to Bn; see
LEAB to An, LEBA to Bn; see
EAB to An, EBA to Bn; see
latch enable; see
An, Bn
Bn, An
10.
…continued
V
GND
V
V
I
OH
OL
All information provided in this document is subject to legal disclaimers.
Figure 9
Rev. 05 — 20 May 2010
V
M
t
PHL
Figure 5
Figure 7
Figure 8
Figure 7
Figure 8
Figure 9
Figure 9
Figure 9
Figure 9
Figure 9
Figure 9
Figure 9
Figure 9
Figure 8
Figure 7
Figure 8
Figure 7
Figure 6
V
Octal latched transceiver with dual enable; 3-state
M
V
M
t
PLH
25 °C; V
+0.5 −0.3
+0.5 −0.2
+0.5 −1.3
+0.5 −1.3
Min
2.4
3.0
1.8
1.9
2.9
3.1
2.0
2.1
2.0
2.0
3.0
3.0
3.0
3.0
3.5
V
M
001aac759
Typ
3.6
4.4
3.0
3.4
4.2
4.6
3.3
3.4
2.8
3.0
1.5
1.5
0.6
0.6
1.8
CC
= 5.0 V −40 °C to +85 °C;
Max
4.5
5.3
3.9
4.1
5.2
5.5
4.3
4.5
5.8
6.2
-
-
-
-
-
-
-
-
-
V
CC
Min
74ABT544
2.4
3.0
1.8
1.9
2.9
3.1
2.0
2.1
2.0
2.0
3.0
3.0
3.0
3.0
0.5
0.5
0.5
0.5
3.5
= 5.0 V ± 0.5 V
© NXP B.V. 2010. All rights reserved.
Max
5.2
6.2
4.7
5.0
6.1
6.5
4.9
5.2
6.3
6.7
-
-
-
-
-
-
-
-
-
7 of 16
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns