TC90A92AFG Toshiba, TC90A92AFG Datasheet - Page 6

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TC90A92AFG

Manufacturer Part Number
TC90A92AFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TC90A92AFG

Function
Multi-standard color decoder and 3D or 3L Y/C separation
Features    
3D-YNR/CNR4Mbit eDRAMS/N detection ITU-R656 output
Power Requirements
3.3V, 2.5V, 1.5V
Package
QFP100 (lead-free)

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217
1023
Aug./2003
100
-20
-40
d) Cb /Cr input
80
60
40
20
0
When using YCbCr mode, it is cautious of the input level to CAD (color system 8bit AD).
As shown in Fig-2, the standard input level of the CAD is 0.7Vp-p.
c) Clamping
The clamp control circuit controls the correct clamping of the analog input signals.
Clamp level for CVBS and Y signal is 256 LSB (10bit unit). For C and Cb/Cr are 128 LSB (8bit unit).
Cb and Cr signals are multiplexed in front of internal 8bit ADC.
Offset adjustment is available independently.
Fig-1 : YAD Input Level (Example : CVBS Input )
Fig-2 : CAD Input Level (Example : Cb Input Signal)
767
256
52
0
TC90A92AFG
6

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