TB6572AFG*** Toshiba, TB6572AFG*** Datasheet - Page 21

• Manufacturer Part Number: TB6572AFG***
• Manufacturer: Toshiba

Specifications of TB6572AFG***

• Function: Controller
• Vopmax (vm*): 17V (30V)
• Io (lpeak): 20mA
• Sinusoidal Current Wave: yes
• Sensor-less: no
• Speed Feedback Loop: yes
• Package: QFP52
• Rohs Compatible†: yes

18. Constant Voltage Circuit
19. Overcurrent Protection Circuit
20. Power Supply Monitor Circuit
21. Thermal Shutdown Circuit
(1)
(2)
(3)
•
The circuit monitors the V
conditions are satisfied:
•
•
•
The circuit turns the external output power FET off if the junction temperature TSD (ON) exceeds 160°C.
The thermal shutdown state is terminated once the TB6572AFG is placed in the stop or brake state.
•
The circuit turns the external output power FET off if the detected voltage is higher than 0.25 V (typ.).
It re-activates the FET according to the carrier frequency.
Note that the Idc pin accepts a direct analog comparator input and is highly sensitive. Use C and R,
therefore, for filtering so that output current noise due to chopping does not activate the overcurrent
protection circuit.
V
V
V
The above protection features are only intended to temporarily protect the device against irregular
conditions and do not provide an absolute protection of the device.
CC
ref1
DD
V
The circuit creates 5 V for biasing the internal analog circuit
and outputs it from the V
Connect a capacitor (0.1 μF to 1 μF) between the V
S-GND to prevent oscillation and absorb noise.
The output load current is 25 mA (tentative value).
*: The Vref1 pin provides a Hall bias current to prevent an ill
V
The circuit outputs 5 V for biasing the internal logic circuit from the V
Connect a capacitor (1 μF recommended) between the V
absorb noise.
Connect no load to the V
V
The circuit creates 8 V for output FET gate driving and outputs it from the V
Connect a capacitor (1 μF or larger) between the V
absorb noise.
ref1
DD
ref2
(H) ≤ 9.5 V (typ.), V
(H) ≤ 3.2 V(typ.), V
behavior from occurring when the V
removed. To reduce the chip’s power consumption, an external
resistor should be added as shown at right.
(H) ≤ 4.5 V (typ.), V
V
ref
= 5 V (typ.) ±0.5 V at Io = 20 mA
Idc1
ref
ref1
CC
ref1
and V
DD
ref
(L) ≤ 9.0 V (typ.)
(L) ≤ 2.7 V(typ.)
(L) ≤ 4.0 V (typ.)
pin.
pin.
V
CC
ref1
voltages and turns the external power FET off if any of the following
CC
supply voltage is
21
0.25 V
ref2
ref1
V
ref1
pin and P-GND to prevent oscillation and
pin and
DD
pin and S-GND to prevent oscillation and
V
Idc2
ref1
DD
pin.
ref2
pin.
TB6572AFG
V
V
V
CC_1
CC
ref1
2008-1-21
External
resistor
(500 Ω)