74HCT2G125DP,125 NXP Semiconductors, 74HCT2G125DP,125 Datasheet - Page 8

IC BUFF DVR TRI-ST DL 8TSSOP

74HCT2G125DP,125

Manufacturer Part Number
74HCT2G125DP,125
Description
IC BUFF DVR TRI-ST DL 8TSSOP
Manufacturer
NXP Semiconductors
Series
74HCTr
Datasheet

Specifications of 74HCT2G125DP,125

Package / Case
8-TSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
6mA, 6mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
HCT
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 6 mA
Input Bias Current (max)
20 uA
Low Level Output Current
6 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
15 ns (Typ) @ 4.5 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4285-2
74HCT2G125DP-G
935270086125
NXP Semiconductors
Table 10.
74HC_HCT2G125_4
Product data sheet
Type
74HC2G125
74HCT2G125
Fig 8.
Test data is given in
Definitions test circuit:
R
C
R
S1 = Test selection switch.
Load circuitry for measuring switching times
T
L
L
Test data
= Termination resistance should be equal to output impedance Z
= Load capacitance including jig and probe capacitance.
= Load resistance.
Input
V
V
3 V
I
CC
Table
negative
positive
t
10.
r
pulse
pulse
, t
6 ns
6 ns
0 V
0 V
f
V
V
G
I
I
90 %
10 %
V I
Load
C
15 pF, 50 pF
15 pF, 50 pF
L
t
t
r
f
V
V
M
M
Rev. 04 — 4 July 2008
R T
10 %
90 %
DUT
V
CC
t
t
74HC2G125; 74HCT2G125
W
W
R
1 k
1 k
L
V O
o
of the pulse generator.
S1 position
t
open
open
V
V
PHL
M
M
C L
t
t
r
f
, t
R L
PLH
S1
001aad983
V
CC
open
Dual buffer/line driver; 3-state
t
GND
GND
PZH
, t
PHZ
© NXP B.V. 2008. All rights reserved.
t
V
V
PZL
CC
CC
, t
PLZ
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