74HCT2G125DP,125 NXP Semiconductors, 74HCT2G125DP,125 Datasheet - Page 9

IC BUFF DVR TRI-ST DL 8TSSOP

74HCT2G125DP,125

Manufacturer Part Number
74HCT2G125DP,125
Description
IC BUFF DVR TRI-ST DL 8TSSOP
Manufacturer
NXP Semiconductors
Series
74HCTr
Datasheet

Specifications of 74HCT2G125DP,125

Package / Case
8-TSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
6mA, 6mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
HCT
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 6 mA
Input Bias Current (max)
20 uA
Low Level Output Current
6 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
15 ns (Typ) @ 4.5 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4285-2
74HCT2G125DP-G
935270086125
NXP Semiconductors
13. Package outline
Fig 9.
74HC_HCT2G125_4
Product data sheet
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
UNIT
mm
Package outline SOT505-2 (TSSOP8)
VERSION
OUTLINE
SOT505-2
max.
1.1
A
0.15
0.00
A 1
8
1
0.95
0.75
A 2
y
pin 1 index
IEC
e
Z
0.25
A 3
D
0.38
0.22
b p
b p
5
0
0.18
0.08
4
JEDEC
c
- - -
w
REFERENCES
D
3.1
2.9
M
(1)
Rev. 04 — 4 July 2008
E
3.1
2.9
(1)
c
JEITA
scale
0.65
2.5
e
74HC2G125; 74HCT2G125
A
H E
4.1
3.9
A 2
A 1
0.5
L
H E
E
0.47
0.33
5 mm
detail X
L p
0.2
v
L
Dual buffer/line driver; 3-state
L p
PROJECTION
EUROPEAN
0.13
w
A
(A 3 )
0.1
y
X
v
M
0.70
0.35
Z
© NXP B.V. 2008. All rights reserved.
A
(1)
ISSUE DATE
02-01-16
8
0
SOT505-2
9 of 14

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